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公开(公告)号:US20190164843A1
公开(公告)日:2019-05-30
申请号:US15824537
申请日:2017-11-28
发明人: Kangguo Cheng , Choonghyun Lee , Juntao Li , Heng Wu , Peng Xu
IPC分类号: H01L21/8234 , H01L29/06 , H01L27/088 , H01L21/311
CPC分类号: H01L21/823481 , H01L21/02323 , H01L21/02337 , H01L21/31111 , H01L21/31122 , H01L21/31133 , H01L21/31155 , H01L21/76224 , H01L21/76237 , H01L21/823412 , H01L21/823431 , H01L21/823456 , H01L27/0886 , H01L29/0653 , H01L29/66795 , H01L29/7851
摘要: In accordance with an embodiment of the present invention, a method of forming a densified fill layer is provided. The method includes forming a pair of adjacent vertical fins on a substrate, forming an inner liner on the sidewalls of the adjacent vertical fins, and forming a sacrificial layer on the inner liner. The method further includes forming a fill layer between the pair of adjacent vertical fins, wherein the fill layer is in contact with at least a portion of the sacrificial layer, removing at least a portion of the sacrificial layer in contact with the fill layer to form sidewall channels adjacent to the fill layer, and subjecting the fill layer to a densification process to form the densified fill layer.
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公开(公告)号:US10062575B2
公开(公告)日:2018-08-28
申请号:US15260755
申请日:2016-09-09
发明人: Tom Choi , Jungmin Ko , Sean Kang
IPC分类号: H01L21/3065 , H01L21/311 , H01L21/02
CPC分类号: H01L21/3065 , H01L21/02323 , H01L21/02326 , H01L21/31116 , H01L21/32105 , H01L21/32137
摘要: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon from the semiconductor substrate.
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公开(公告)号:US20180233507A1
公开(公告)日:2018-08-16
申请号:US15950313
申请日:2018-04-11
发明人: Ju-Youn KIM
IPC分类号: H01L27/11 , H01L21/8238 , H01L29/49 , H01L21/3213 , H01L29/66 , H01L27/108 , H01L29/423 , H01L27/092 , H01L29/51 , H01L21/8234
CPC分类号: H01L27/1104 , G11C11/412 , H01L21/02304 , H01L21/02323 , H01L21/02362 , H01L21/28088 , H01L21/28185 , H01L21/32134 , H01L21/32139 , H01L21/823425 , H01L21/823431 , H01L21/82345 , H01L21/823462 , H01L21/823814 , H01L21/823821 , H01L21/823842 , H01L21/823857 , H01L21/823878 , H01L27/0207 , H01L27/0617 , H01L27/0705 , H01L27/0886 , H01L27/092 , H01L27/0922 , H01L27/0924 , H01L27/108 , H01L27/1116 , H01L29/401 , H01L29/408 , H01L29/42364 , H01L29/42372 , H01L29/42376 , H01L29/4966 , H01L29/517 , H01L29/518 , H01L29/66545
摘要: A semiconductor device includes first through fourth areas, first through fourth gate stacks, the first gate stack includes a first high-dielectric layer, a first TiN layer to contact the first high-dielectric layer, and a first gate metal on the first TiN layer, the second gate stack includes a second high-dielectric layer, a second TiN layer to contact the second high-dielectric layer, and a second gate metal on the second TiN layer, the third gate stack includes a third high-dielectric layer, a third TiN layer to contact the third high-dielectric layer, and a third gate metal on the third TiN layer, and the fourth gate stack includes a fourth high-dielectric layer, a fourth TiN layer to contact the fourth high-dielectric layer, and a fourth gate metal on the fourth TiN layer, the first through fourth thicknesses of the TiN layers being different.
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公开(公告)号:US10043669B2
公开(公告)日:2018-08-07
申请号:US15412066
申请日:2017-01-23
发明人: Shao-Ping Chen
IPC分类号: H01L21/336 , H01L29/165 , H01L21/28 , H01L29/49 , H01L21/22 , H01L21/38 , H01L29/51 , H01L21/02
CPC分类号: H01L29/517 , H01L21/02323 , H01L21/02326 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/515 , H01L29/518
摘要: A method for fabricating a metal gate structure includes following steps. A substrate is provided and followed by forming a high-K dielectric layer on the substrate. Then, an oxygen-containing titanium nitride layer is formed on the high-K dielectric layer. Next, an amorphous silicon layer is formed on the oxygen-containing titanium nitride layer and followed by performing an annealing process to drive oxygen in the oxygen-containing titanium nitride layer to the high-K dielectric layer.
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公开(公告)号:US20180197945A1
公开(公告)日:2018-07-12
申请号:US15801743
申请日:2017-11-02
发明人: Takashi Ando , Hemanth Jagannathan , Paul C. Jamison , John Rozen
CPC分类号: H01L28/75 , H01L21/02186 , H01L21/02244 , H01L21/02323
摘要: Methods of forming capacitors include forming a dielectric layer on a first metal layer. The dielectric layer is oxygenated such that interstitial oxygen is implanted in the dielectric layer. A second metal layer is formed on the dielectric layer. The dielectric layer is heated to release the interstitial oxygen and to oxidize the first and second metal layers at interfaces between the dielectric layer and the first and second metal layers.
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公开(公告)号:US20180190834A1
公开(公告)日:2018-07-05
申请号:US15909165
申请日:2018-03-01
发明人: Shunpei YAMAZAKI , Kengo AKIMOTO
IPC分类号: H01L29/786 , H01L29/66 , H01L29/49 , H01L21/02 , H01L29/24
CPC分类号: H01L29/78696 , H01L21/02318 , H01L21/02323 , H01L21/0234 , H01L21/02565 , H01L29/247 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L29/78693
摘要: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
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公开(公告)号:US20180174862A1
公开(公告)日:2018-06-21
申请号:US15893748
申请日:2018-02-12
IPC分类号: H01L21/477 , H01L21/02
CPC分类号: H01L21/477 , H01L21/0214 , H01L21/02164 , H01L21/02172 , H01L21/02274 , H01L21/02323 , H01L21/02554 , H01L21/02565 , H01L21/02614 , H01L21/02631 , H01L29/4908 , H01L29/66969 , H01L29/78648 , H01L29/7869 , H01L29/78693
摘要: In a semiconductor device including an oxide semiconductor, a change in electrical characteristics is inhibited and reliability is improved. The semiconductor device is manufactured by a method including first to fourth steps. The first step includes a step of forming an oxide semiconductor film, the second step includes a step of forming an oxide insulating film over the oxide semiconductor film, the third step includes a step of forming a protective film over the oxide insulating film, and the fourth step includes a step of adding oxygen to the oxide insulating film through the protective film. In the first step, the oxide semiconductor film is formed under a condition in which an oxygen vacancy is formed. The oxygen from the oxide insulating film fills the oxygen vacancy after the fourth step.
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公开(公告)号:US20180166277A1
公开(公告)日:2018-06-14
申请号:US15825250
申请日:2017-11-29
IPC分类号: H01L21/033 , H01L21/02
CPC分类号: H01L21/0337 , G03F7/00 , H01L21/02172 , H01L21/02266 , H01L21/0228 , H01L21/02323 , H01L21/02356 , H01L21/0332 , H05K999/99
摘要: A method is disclosed to prepare a substrate for photolithography. The method includes forming an underlayer over a surface of the substrate; depositing an interface hardmask layer on the underlayer using one of a vapor phase deposition process or an atomic layer deposition process; and forming a layer of extreme UV (EUV) resist on the interface hardmask layer, where the interface hardmask layer is comprised of material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer. Also disclosed is a structure configured for photolithography. The structure includes a substrate; an underlayer over a surface of the substrate; an interface hardmask layer disposed on the underlayer; and a layer of EUV resist disposed on the interface hardmask layer. The interface hardmask layer contains material having a composition and properties tuned to achieve a certain secondary electron yield from the interface hardmask layer.
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公开(公告)号:US20180151740A1
公开(公告)日:2018-05-31
申请号:US15399241
申请日:2017-01-05
发明人: Cheng-Ta WU , Chii-Ming WU , Shiu-Ko JANGJIAN , Kun-Tzu LIN , Lan-Fang CHANG
IPC分类号: H01L29/78 , H01L29/423 , H01L29/40 , H01L21/28 , H01L21/3115 , H01L29/49 , H01L29/51
CPC分类号: H01L29/7856 , H01L21/02321 , H01L21/02323 , H01L21/28158 , H01L21/3115 , H01L21/31155 , H01L29/401 , H01L29/42364 , H01L29/495 , H01L29/512
摘要: A method of making a semiconductor device includes doping a first portion of an interlayer dielectric (ILD) with an oxygen-containing material, wherein the ILD is over a substrate. The method further includes doping a second portion of the ILD with a large species material. The second portion includes an area of the ILD below the first portion, and the second portion is separated from the substrate. The method further includes annealing the ILD.
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公开(公告)号:US20180076044A1
公开(公告)日:2018-03-15
申请号:US15260755
申请日:2016-09-09
发明人: Tom Choi , Jungmin Ko , Sean Kang
IPC分类号: H01L21/3065 , H01L21/311 , H01L21/02
CPC分类号: H01L21/3065 , H01L21/02323 , H01L21/02326 , H01L21/31116 , H01L21/32105 , H01L21/32137
摘要: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon from the semiconductor substrate.
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