公开(公告)号：US20150214146A1

公开(公告)日：2015-07-30

申请号：US14591732

申请日：2015-01-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-ik KIM ,  Hyoung-sub KIM ,  Sung-eui KIM ,  Hoon JEONG

IPC: H01L23/528

CPC classification number: H01L27/10885 ,  H01L27/10855 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate including an active region, a plurality of conductive line structures separate from the substrate, a plurality of contact plugs between the plurality of conductive line structures, a plurality of landing pads connected to a corresponding contact plug of the plurality of contact plugs, a landing pad insulation pattern between the plurality of landing pads, and a first insulation spacer between the landing pad insulation pattern and first conductive line structures from among the plurality of conductive line structures.

Abstract translation: 一种半导体器件包括：衬底，包括有源区，与衬底分离的多个导线结构;多个导线结构之间的多个接触插塞;多个接地焊盘，其连接到多个 接触插塞，多个着陆焊盘之间的着陆焊盘绝缘图案，以及在多个导线结构之间的着陆焊盘绝缘图案和第一导线结构之间的第一绝缘隔离件。

公开(公告)号：US20150380508A1

公开(公告)日：2015-12-31

申请号：US14697782

申请日：2015-04-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dae-ik KIM ,  Hyoung-sub KIM ,  Sung-eui KIM

IPC: H01L29/45 ,  H01L23/528

CPC classification number: H01L27/10855 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10823 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor device includes a semiconductor substrate including a plurality of active areas, a bit line crossing the plurality of active areas, a direct contact connecting a first active area of the plurality of active areas with the bit line, an insulating spacer covering a side wall of the bit line and extending at a level lower than a level of an upper surface of the semiconductor substrate, a contact pad connected with a side wall of a second active area of the plurality of active areas, which neighbors the first active area, a first insulating pattern defining a contact hole exposing the insulating spacer and the contact pad, and a buried contact connected with the contact pad and filling the contact hole.

Abstract translation: 半导体器件包括：半导体衬底，包括多个有效区域，与多个有源区域交叉的位线;将多个有源区域的第一有源区域与位线连接的直接接触;覆盖侧壁 并且在比半导体衬底的上表面的电平低的水平处延伸的触点焊盘与多个有源区域的与第一有源区域相邻的第二有源区域的侧壁连接的接触焊盘， 第一绝缘图案限定了暴露绝缘间隔件和接触焊盘的接触孔，以及与接触垫连接并填充接触孔的埋入触头。