公开(公告)号：US11715697B2

公开(公告)日：2023-08-01

申请号：US17096107

申请日：2020-11-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sungbum Kim ,  Taewoo Kang ,  Jaewon Choi

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L23/5386 ,  H01L23/3107 ,  H01L23/49816

Abstract: A semiconductor package may include a lower package including a first substrate, a first semiconductor chip on the first substrate, and a first molding portion on the first substrate to cover the first semiconductor chip, an interposer substrate on the first semiconductor chip, a supporting portion between the interposer substrate and the first substrate to support the interposer substrate, a connection terminal connecting the interposer substrate to the first substrate, and an upper package on the interposer substrate. The upper package may include a second substrate, a second semiconductor chip on the second substrate, and a second molding portion on the second substrate to cover the second semiconductor chip.