公开(公告)号：US20240346222A1

公开(公告)日：2024-10-17

申请号：US18510969

申请日：2023-11-16

申请人： Samsung Electronics Co., Ltd.

发明人： Jiho Han ,  Jong-Seong Kim ,  Sungju Jang ,  Hyuckjoon Kwon ,  Sunghoon Kim ,  Raehyun Song

IPC分类号： G06F30/392

CPC分类号： G06F30/392

摘要： Disclosed is an operating method of an electronic device that includes a processor and supports manufacture of a semiconductor device. The operating method includes receiving, at the processor, circuit schematics for the manufacture of the semiconductor device, partitioning, at the processor, circuit components of the circuit schematics into at least two mats, calculating, at the processor, availability of placement and routing of the circuit components, based on limited connecting elements electrically connected to the circuit components, for each of the at least two mats, and performing, at the processor, the placement and routing to generate a layout image for the manufacture of the semiconductor device when the availability indicates that the placement and routing is available. The limited connecting elements include vertical lines, which electrically connect an upper portion and a lower portion of the semiconductor device, at limited locations of the semiconductor device.