METHOD OF FABRICATING SEMICONDUCTOR DEVICE
    1.
    发明申请
    METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20170039300A1

    公开(公告)日:2017-02-09

    申请号:US15079640

    申请日:2016-03-24

    CPC classification number: G06F17/505 G06F17/5068

    Abstract: A semiconductor device may be manufactured based on patterning groups to include a metal layer patterned according to separate patterning groups. The patterning groups may be based on a layout pattern. Preparing the layout pattern may include selecting first and second power patterns, selecting first and second patterns therebetween, and selecting a tie-connection pattern to connect the first power pattern to the first pattern. The manufacturing may include forming metal lines according to the patterning groups. Photomasks may be manufactured according to the layout pattern, and the metal lines may be formed according to the photomasks. A first photomask may be manufactured based on the first and second power patterns, the first pattern, and the tie-connection pattern, and a second photomask may be manufactured based on the second pattern.

    Abstract translation: 可以基于图案化组制造半导体器件,以包括根据单独的图案化组图案化的金属层。 图案化组可以基于布局图案。 准备布局图案可以包括选择第一和第二功率图案,在它们之间选择第一和第二图案,以及选择连接图案以将第一功率图案连接到第一图案。 制造可以包括根据图案化组形成金属线。 可以根据布局图案来制造光掩模,并且可以根据光掩模形成金属线。 可以基于第一和第二功率图案,第一图案和连接图案来制造第一光掩模,并且可以基于第二图案来制造第二光掩模。

    METHOD FOR PLACING PARALLEL MULTIPLIER
    2.
    发明申请
    METHOD FOR PLACING PARALLEL MULTIPLIER 有权
    放置并行乘法器的方法

    公开(公告)号:US20160283614A1

    公开(公告)日:2016-09-29

    申请号:US15068931

    申请日:2016-03-14

    CPC classification number: G06F17/505 G06F17/5072

    Abstract: A method for placing a parallel multiplier with a placement and routing tool includes receiving a datapath netlist about the parallel multiplier, extracting locations of primary input cells and primary output cells from the datapath netlist using a structure analysis module, mapping the primary input cells and the primary output cells on a specific array using the placement and routing tool, and arranging columns of the primary input cells and the primary output cells based on physical sizes of the primary input cells. The columns are arranged using the placement and routing tool. The size of the specific array is determined according to a number of the primary input cells.

    Abstract translation: 用于放置具有布置和布线工具的并行乘法器的方法包括:接收关于并行乘法器的数据路径网表,使用结构分析模块从数据路径网表提取主输入单元和主输出单元的位置,映射主输入单元和 使用放置和布线工具在特定阵列上的主输出单元,以及基于主输入单元的物理大小来排列主输入单元和主输出单元的列。 列使用布置和布线工具排列。 根据主输入单元的数量来确定特定阵列的大小。

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