公开(公告)号：US20180158828A1

公开(公告)日：2018-06-07

申请号：US15673843

申请日：2017-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-uk HAN ,  Soo-jin HONG ,  Wook-yeol YI

IPC: H01L27/108 ,  H01L29/06 ,  H01L21/02 ,  H01L29/423 ,  H01L49/02 ,  H01L21/768 ,  H01L21/762

CPC classification number: H01L27/10823 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02233 ,  H01L21/02255 ,  H01L21/28123 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76224 ,  H01L21/76229 ,  H01L21/76804 ,  H01L21/76877 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10897 ,  H01L28/90 ,  H01L29/0649 ,  H01L29/0684 ,  H01L29/4236

Abstract: A semiconductor device may include a semiconductor substrate, a trench isolation layer on the semiconductor substrate and configured to define an active region, and a multi-liner layer on an inside wall of a trench including the trench isolation layer. The multi-liner layer may include a first liner layer on the inside wall of the trench, a second liner layer on the first liner layer, and a third liner layer on the second liner layer.