SEMICONDUCTOR PACKAGES
    1.
    发明公开

    公开(公告)号:US20240363472A1

    公开(公告)日:2024-10-31

    申请号:US18768963

    申请日:2024-07-10

    Abstract: A semiconductor includes a lower structure, an upper structure on the lower structure, and a connection pattern between the lower structure and the upper structure. The connection pattern is configured to electrically connect the lower structure and the upper structure to each other. The lower structure includes a lower base and a first lower chip on the lower base. The first lower chip includes a chip bonding pad, a pad structure, and a heat sink structure. The connection pattern is connected to the upper structure and extends away from the upper structure to be connected to the pad structure. The pad structure has a thickness greater than a thickness of the chip bonding pad. At least a portion of the heat sink structure is at a same height level as at least a portion of the pad structure.

    SEMICONDUCTOR PACKAGES
    2.
    发明申请

    公开(公告)号:US20210343617A1

    公开(公告)日:2021-11-04

    申请号:US17376570

    申请日:2021-07-15

    Abstract: A semiconductor includes a lower structure, an upper structure on the lower structure, and a connection pattern between the lower structure and the upper structure. The connection pattern is configured to electrically connect the lower structure and the upper structure to each other. The lower structure includes a lower base and a first lower chip on the lower base. The first lower chip includes a chip bonding pad, a pad structure, and a heat sink structure. The connection pattern is connected to the upper structure and extends away from the upper structure to be connected to the pad structure. The pad structure has a thickness greater than a thickness of the chip bonding pad. At least a portion of the heat sink structure is at a same height level as at least a portion of the pad structure.

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