公开(公告)号：US11515848B2

公开(公告)日：2022-11-29

申请号：US17232762

申请日：2021-04-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngbae Moon ,  Woonyoung Lee ,  Chanbong Yu ,  Yunseok Jang

IPC: H03F3/45 ,  H02H9/04 ,  G09G3/3275 ,  G11C19/00

Abstract: An output buffer circuit includes an operational amplifier configured to generate an amplifier output voltage signal based on an input voltage signal and on a compensation current, a slew rate compensating circuit configured to generate the compensation current to increase a slew rate of the amplifier output voltage signal based on a difference between the input voltage signal and a feedback voltage signal, an output path circuit connected between the operational amplifier and an output pad, the output path circuit configured to transfer the amplifier output voltage signal to generate a pad output voltage signal through the output pad, and a feedback path circuit, the feedback path circuit connected between the slew rate compensating circuit and a feedback input node that is on the output path circuit, the feedback path circuit configured to generate the feedback voltage signal.

公开(公告)号：US11322071B2

公开(公告)日：2022-05-03

申请号：US17090720

申请日：2020-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyunghoon Chung ,  Jaesung Kang ,  Jihyun Lee ,  Jeongwoo Lim ,  Yunseok Jang ,  Jaewon Choi

IPC: G09G3/20 ,  H03F3/45

Abstract: An operational amplifier includes an input stage with a first main input unit, a first auxiliary input unit, a second main input unit and a second auxiliary input unit, an amplification stage with a first current mirror receiving currents from the first main input unit and the first auxiliary input unit, and a second current mirror receiving currents from the second main input unit and the second auxiliary input unit, an output stage receiving voltages from the first current mirror and the second current mirror, a voltage storage unit storing an intermediate voltage based on an output signal generated by the output stage during at least one of a first operation period and a second operation period, and a switching unit that differently controls a first feedback path between the output stage and the input stage and a second feedback path between the output stage to the voltage storage unit in accordance with the first operation period and the second operation period.