DEVICE AND METHOD FOR EXECUTING FOURIER TRANSFORM
    1.
    发明申请
    DEVICE AND METHOD FOR EXECUTING FOURIER TRANSFORM 审中-公开
    用于执行FOURIER变换的设备和方法

    公开(公告)号:US20100094920A1

    公开(公告)日:2010-04-15

    申请号:US12536240

    申请日:2009-08-05

    IPC分类号: G06F17/14

    CPC分类号: G06F17/142

    摘要: A Fourier transform device generates a first sequence according to an input sequence based on a stored lookup table, and generates an output sequence by performing a butterfly operation on the first sequence a plurality of times. Therefore, hardware capacity and power consumption of the Fourier transform device can be reduced

    摘要翻译: 傅里叶变换装置根据存储的查找表根据输入序列生成第一序列,并且通过多次对第一序列执行蝶形运算来生成输出序列。 因此,可以降低傅里叶变换装置的硬件容量和功耗

    Synchronization error tracking device and method thereof
    2.
    发明授权
    Synchronization error tracking device and method thereof 失效
    同步误差跟踪装置及其方法

    公开(公告)号:US07953199B2

    公开(公告)日:2011-05-31

    申请号:US12610604

    申请日:2009-11-02

    IPC分类号: H04L7/00 H04L25/00 H04L25/40

    CPC分类号: H04B1/7183 H04B1/7075

    摘要: Provided is a synchronization error tracking device and method. The method and system estimates and corrects the synchronization error generated by time and frequency offsets during the data transmission interval and uses a module designed for initial synchronization or channel estimation without adding a new correlation operator. Further, a combining mark value and a synchronization position value acquired during the synchronization process are used.

    摘要翻译: 提供了一种同步误差跟踪装置和方法。 该方法和系统估计并校正数据传输间隔期间由时间和频率偏移产生的同步误差,并使用设计用于初始同步或信道估计的模块,而不添加新的相关运算符。 此外,使用在同步处理期间获取的组合标记值和同步位置值。

    METHOD AND DEVICE FOR SENSING FREQUENCY FOR OFDM SYSTEMS
    3.
    发明申请
    METHOD AND DEVICE FOR SENSING FREQUENCY FOR OFDM SYSTEMS 有权
    OFDM系统感测频率的方法和装置

    公开(公告)号:US20130223575A1

    公开(公告)日:2013-08-29

    申请号:US13884175

    申请日:2011-10-25

    IPC分类号: H04L27/26

    摘要: Provided is a frequency sensing method and apparatus in an orthogonal frequency division multiplexing (OFDM) system. Provided is a method of sensing a frequency of a received signal that is received from an outside in order to perform one of a plurality of radio communications. An OFDM apparatus may need to inspect a required frequency band before or after performing one of the plurality of radio communications, and to determine whether the frequency band is being used by another radio communication.

    摘要翻译: 提供了一种正交频分复用(OFDM)系统中的频率感测方法和装置。 提供了一种感测从外部接收的接收信号的频率以便执行多个无线电通信之一的方法。 OFDM装置可能需要在执行多个无线电通信之一之前或之后检查所需的频带,并且确定频带是否被另一个无线电通信使用。

    Method and device for sensing frequency for OFDM systems
    4.
    发明授权
    Method and device for sensing frequency for OFDM systems 有权
    用于感测OFDM系统频率的方法和装置

    公开(公告)号:US09191259B2

    公开(公告)日:2015-11-17

    申请号:US13884175

    申请日:2011-10-25

    IPC分类号: H04L27/06 H04L27/26 H04L27/00

    摘要: Provided is a frequency sensing method and apparatus in an orthogonal frequency division multiplexing (OFDM) system. Provided is a method of sensing a frequency of a received signal that is received from an outside in order to perform one of a plurality of radio communications. An OFDM apparatus may need to inspect a required frequency band before or after performing one of the plurality of radio communications, and to determine whether the frequency band is being used by another radio communication.

    摘要翻译: 提供了一种正交频分复用(OFDM)系统中的频率感测方法和装置。 提供了一种感测从外部接收的接收信号的频率以便执行多个无线电通信之一的方法。 OFDM装置可能需要在执行多个无线电通信之一之前或之后检查所需的频带,并且确定频带是否被另一个无线电通信使用。

    2N-point and N-point FFT/IFFT dual mode processor
    5.
    发明授权
    2N-point and N-point FFT/IFFT dual mode processor 失效
    2N点和N点FFT / IFFT双模式处理器

    公开(公告)号:US07693924B2

    公开(公告)日:2010-04-06

    申请号:US11264886

    申请日:2005-11-02

    IPC分类号: G06F17/14

    CPC分类号: H04L27/265 H04L27/263

    摘要: A 2N-point and N-point FFT/IFFT dual mode processor is provided. The processor includes a butterfly operator, the first and second MUXs, and the first and second N-point FFT processors. The butterfly operator receives 2N data and butterfly-operates on the received 2N data when receiving a control signal ‘0’ from the controller. The first and second MUXs respectively receive results from the butterfly operator to output the results in an increment of N when receiving a control signal ‘0’ from the controller, and respectively outputs different N data when receiving a control signal ‘1’ from the controller. The first and second N-point FFT processors N-point FFT operate on the results from the first and second MUXs and respectively output the same under control of the controller. Since the N-point FFT operation can be simultaneously performed two times at a receiver, the performance of the receiver can be enhanced.

    摘要翻译: 提供2N点和N点FFT / IFFT双模式处理器。 处理器包括蝶形运算符,第一和第二MUX以及第一和第二N点FFT处理器。 当从控制器接收到控制信号“0”时,蝶形运算符接收2N个数据并对接收的2N数据进行蝶形运算。 当从控制器接收到控制信号“0”时,第一和第二MUX分别接收蝶形运算器的结果以输出N的增量,并且当从控制器接收到控制信号“1”时分别输出不同的N数据 。 第一和第二N点FFT处理器N点FFT对来自第一和第二MUX的结果进行操作,并在控制器的控制下分别输出。 由于在接收机可以同时进行N点FFT运算两次,所以可以提高接收机的性能。

    Method for Transforming Data by Look-Up Table
    6.
    发明申请
    Method for Transforming Data by Look-Up Table 有权
    通过查找表转换数据的方法

    公开(公告)号:US20080071847A1

    公开(公告)日:2008-03-20

    申请号:US11576565

    申请日:2005-11-02

    IPC分类号: G06F17/14 G06F7/38 G06F7/52

    CPC分类号: H04L27/263 H04L27/265

    摘要: Provided is a method for transforming data using a look-up table. The method includes the steps of: (a) mapping preprocessed input binary data to a constellation diagram divided into four quadrants to output a first complex number; (b) performing addition/subtraction operations between real numbers and between imaginary numbers with respect to the first complex number and a second complex number; and (c) reading a fourth complex from a look-up table in response to the first complex number, the second complex number and a third complex number, the look-up table outputting the fourth complex by performing a subtraction operation on multiplication results between real numbers and between imaginary numbers and an addition operation on multiplication results between the real numbers and the imaginary numbers with respect to the result value of the step (b) and the third complex number. Accordingly, it is possible to reduce the hardware size at the time of IFFT/FFT design and to provide a high-speed, low-power operation.

    摘要翻译: 提供了一种使用查找表来转换数据的方法。 该方法包括以下步骤:(a)将预处理的输入二进制数据映射到分成四个象限的星座图,以输出第一个复数; (b)相对于第一复数和第二复数执行实数之间和虚数之间的加法/减法运算; 以及(c)响应于所述第一复数,所述第二复数和第三复数,从查找表读取第四复数,所述查找表通过对多个 在实数和虚数之间,以及相对于步骤(b)和第三复数的结果值的实数和虚数之间的相乘结果的加法运算。 因此,可以在IFFT / FFT设计时降低硬件尺寸并提供高速,低功率操作。

    Method for transforming data by look-up table
    7.
    发明授权
    Method for transforming data by look-up table 有权
    通过查找表转换数据的方法

    公开(公告)号:US07831649B2

    公开(公告)日:2010-11-09

    申请号:US11576565

    申请日:2005-11-02

    IPC分类号: G06F17/14

    CPC分类号: H04L27/263 H04L27/265

    摘要: Provided is a method for transforming data using a look-up table. The method includes the steps of: (a) mapping pre-processed input binary data to a constellation diagram divided into four quadrants to output a first complex number; (b) performing addition/subtraction operations between real numbers and between imaginary numbers with respect to the first complex number and a second complex number; and (c) reading a fourth complex from a look-up table in response to the first complex number, the second complex number and a third complex number, the look-up table outputting the fourth complex by performing a subtraction operation on multiplication results between real numbers and between imaginary numbers and an addition operation on multiplication results between the real numbers and the imaginary numbers with respect to the result value of the step (b) and the third complex number. Accordingly, it is possible to reduce the hardware size at the time of IFFT/FFT design and to provide a high-speed, low-power operation.

    摘要翻译: 提供了一种使用查找表来转换数据的方法。 该方法包括以下步骤:(a)将预处理的输入二进制数据映射到分成四个象限的星座图,以输出第一个复数; (b)相对于第一复数和第二复数执行实数之间和虚数之间的加法/减法运算; 以及(c)响应于第一复数,第二复数和第三复数,从查找表读取第四复数,查找表通过对乘法结果执行减法运算来输出第四复数 实数和虚数之间以及相对于步骤(b)和第三复数的结果值的实数和虚数之间的相乘结果的加法运算。 因此,可以在IFFT / FFT设计时降低硬件尺寸并提供高速,低功率操作。