公开(公告)号：US07734880B2

公开(公告)日：2010-06-08

申请号：US11595925

申请日：2006-11-13

申请人： Sang-gu Kang ,  Young-Ho Lim

发明人： Sang-gu Kang ,  Young-Ho Lim

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/3454 ,  G11C16/3459

摘要： A memory system includes a flash memory and a memory controller configured to control the flash memory. The memory controller determines whether program data provided from a host are all stored in the flash memory during a program operation. When the determination result is that the program data are all stored in the flash memory, the memory controller controls the flash memory to execute a dummy program operation for the next wordline of a final wordline in which the program data are stored.

摘要翻译： 存储器系统包括闪速存储器和被配置为控制闪速存储器的存储器控​​制器。 存储器控制器在程序操作期间确定从主机提供的程序数据是否全部存储在闪速存储器中。 当确定结果是程序数据全部存储在闪速存储器中时，存储器控制器控制闪存以对存储程序数据的最终字线的下一个字线执行虚拟程序操作。

公开(公告)号：US07539063B2

公开(公告)日：2009-05-26

申请号：US11651521

申请日：2007-01-10

申请人： Sang-Gu Kang ,  Young-Ho Lim

发明人： Sang-Gu Kang ,  Young-Ho Lim

IPC分类号： G11C11/34

CPC分类号： G11C11/5628

摘要： Flash memory devices and methods of programming the same are provided. The flash memory devices include a plurality of memory cells storing multi-bit data representing at least one of first through fourth states and including most significant bits and least significant bits. The method includes programming the plural memory cells into a provisional state according to the least significant bit, and programming the plurality of memory cells into the second through fourth states from the first and provisional states according to the most significant bit. Programming the plurality of memory cells into the second through fourth states includes simultaneously programming the plurality of memory cells at least partially into at least two states during one programming operation period.

摘要翻译： 提供闪存设备及其编程方法。 闪速存储器件包括存储多位数据的多个存储单元，该多位数据表示第一至第四状态中的至少一个，并且包括最高有效位和最低有效位。 该方法包括根据最低有效位将多个存储器单元编程为临时状态，并根据最高有效位将第一至暂态状态的多个存储单元编程为第二至第四状态。 将多个存储器单元编程为第二至第四状态包括在一个编程操作周期期间至少部分地将多个存储器单元编程为至少两个状态。

公开(公告)号：US07561467B2

公开(公告)日：2009-07-14

申请号：US11657697

申请日：2007-01-25

申请人： Dong-Ku Kang ,  Young-Ho Lim ,  Sang-Gu Kang

发明人： Dong-Ku Kang ,  Young-Ho Lim ,  Sang-Gu Kang

IPC分类号： G11C11/34

CPC分类号： G11C16/3454 ,  G11C11/5628 ,  G11C2211/5621 ,  G11C2211/5642 ,  G11C2211/5643

摘要： A method is for programming a flash memory device which includes a plurality of memory cells storing multi-bit data representing one of a plurality of states. The method includes programming the multi-bit data into selected memory cells of the plurality of memory cells, the programming including a first verify-reading operation performed by a first verifying voltage, determining whether to execute a reprogramming operation for each of the selected memory cells, and reprogramming the selected memory cells in accordance with the determination. The reprogramming of the selected memory cells includes a second verify-reading operation performed by a second verifying voltage, the second verifying voltage being higher than the first verifying voltage.

摘要翻译： 一种用于对闪速存储器件进行编程的方法，该闪存器件包括存储表示多种状态之一的多位数据的多个存储器单元。 该方法包括将多位数据编程到多个存储单元的选定存储单元中，该程序包括由第一验证电压执行的第一验证读取操作，确定是否对所选存储单元中的每一个执行重编程操作 ，并且根据该确定重新编程所选择的存储单元。 所选择的存储单元的重新编程包括由第二验证电压执行的第二验证读取操作，第二验证电压高于第一验证电压。

公开(公告)号：US20080068883A1

公开(公告)日：2008-03-20

申请号：US11651521

申请日：2007-01-10

申请人： Sang-Gu Kang ,  Young-Ho Lim

发明人： Sang-Gu Kang ,  Young-Ho Lim

IPC分类号： G11C16/04

CPC分类号： G11C11/5628

摘要： Flash memory devices and methods of programming the same are provided. The flash memory devices include a plurality of memory cells storing multi-bit data representing at least one of first through fourth states and including most significant bits and least significant bits. The method includes programming the plural memory cells into a provisional state according to the least significant bit, and programming the plurality of memory cells into the second through fourth states from the first and provisional states according to the most significant bit. Programming the plurality of memory cells into the second through fourth states includes simultaneously programming the plurality of memory cells at least partially into at least two states during one programming operation period.

摘要翻译： 提供闪存设备及其编程方法。 闪速存储器件包括存储多位数据的多个存储单元，该多位数据表示第一至第四状态中的至少一个，并且包括最高有效位和最低有效位。 该方法包括根据最低有效位将多个存储器单元编程为临时状态，并根据最高有效位将第一至暂态状态的多个存储单元编程为第二至第四状态。 将多个存储器单元编程为第二至第四状态包括在一个编程操作周期期间至少部分地将多个存储器单元编程为至少两个状态。

公开(公告)号：US20070171722A1

公开(公告)日：2007-07-26

申请号：US11595925

申请日：2006-11-13

申请人： Sang-gu Kang ,  Young-Ho Lim

发明人： Sang-gu Kang ,  Young-Ho Lim

IPC分类号： G06F12/00 ,  G11C16/04 ,  G11C11/34

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/3454 ,  G11C16/3459

摘要： A memory system includes a flash memory and a memory controller configured to control the flash memory. The memory controller determines whether program data provided from a host are all stored in the flash memory during a program operation. When the determination result is that the program data are all stored in the flash memory, the memory controller controls the flash memory to execute a dummy program operation for the next wordline of a final wordline in which the program data are stored.

摘要翻译： 存储器系统包括闪速存储器和被配置为控制闪速存储器的存储器控​​制器。 存储器控制器在程序操作期间确定从主机提供的程序数据是否全部存储在闪速存储器中。 当确定结果是程序数据全部存储在闪速存储器中时，存储器控制器控制闪存以对存储程序数据的最终字线的下一个字线执行虚拟程序操作。

公开(公告)号：US20070171709A1

公开(公告)日：2007-07-26

申请号：US11598090

申请日：2006-11-13

申请人： Sang-gu Kang ,  Young-Ho Lim

发明人： Sang-gu Kang ,  Young-Ho Lim

IPC分类号： G11C11/34 ,  G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/12 ,  G11C16/3459

摘要： The invention provides a programming method for a flash memory device including first and second bitlines connected with a plurality of memory cells for storing multi-bit data indicating one of a plurality of states. The program method may include programming memory cells, connected with a selected row and the second bitlines, with multi-bit data; determining whether the selected row is the last row; and reprogramming programmed memory cells connected with the selected row being the last row and the first bitlines when the determination result is that the selected row is the last row.

摘要翻译： 本发明提供了一种用于闪存器件的编程方法，其包括与多个存储器单元连接的第一和第二位线，用于存储指示多个状态之一的多位数据。 程序方法可以包括利用多位数据来编程与所选择的行和第二位线连接的存储器单元; 确定所选行是否是最后一行; 并且当确定结果是所选择的行是最后一行时，与所选行连接的编程存储器单元重新编程为最后一行和第一位。

公开(公告)号：US07362612B2

公开(公告)日：2008-04-22

申请号：US11598090

申请日：2006-11-13

申请人： Sang-gu Kang ,  Young-Ho Lim

发明人： Sang-gu Kang ,  Young-Ho Lim

IPC分类号： G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/12 ,  G11C16/3459

摘要： The invention provides a programming method for a flash memory device including first and second bitlines connected with a plurality of memory cells for storing multi-bit data indicating one of a plurality of states. The program method may include programming memory cells, connected with a selected row and the second bitlines, with multi-bit data; determining whether the selected row is the last row; and reprogramming programmed memory cells connected with the selected row being the last row and the first bitlines when the determination result is that the selected row is the last row.

摘要翻译： 本发明提供了一种用于闪存器件的编程方法，其包括与多个存储器单元连接的第一和第二位线，用于存储指示多个状态之一的多位数据。 程序方法可以包括利用多位数据来编程与所选择的行和第二位线连接的存储器单元; 确定所选行是否是最后一行; 并且当确定结果是所选择的行是最后一行时，与所选行连接的编程存储器单元重新编程为最后一行和第一位。

公开(公告)号：US20070253249A1

公开(公告)日：2007-11-01

申请号：US11607991

申请日：2006-12-04

申请人： Sang-Gu Kang ,  Young-Ho Lim

发明人： Sang-Gu Kang ,  Young-Ho Lim

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/3418

摘要： In a method of programming a nonvolatile memory device comprising a plurality of n-valued nonvolatile memory cells arranged in a matrix, wherein n is a natural number greater than or equal to two (2), the method comprises; programming i-valued data to three or more memory cells contiguously arranged along a first direction of the matrix before programming (i+1)-valued data to any of the three or more memory cells, wherein i is less than n, and wherein the three or more memory cells are programmed during three or more respectively distinct program periods, and after programming the i-valued data to the three or more memory cells, programming (i+1)-valued data to a particular memory cell among the three or more memory cells.

摘要翻译： 在一种非易失性存储器件的编程方法中，包括以矩阵形式排列的多个n值非易失性存储单元，其中n为大于或等于2（2）的自然数，该方法包括： 将i值数据编程到沿着矩阵的第一方向连续排列的三个或更多个存储器单元，然后将其编程（i + 1）值数据分配给三个或更多个存储器单元中的任何一个，其中i小于n，并且其中 三个或更多个存储器单元在三个或更多个分别不同的程序周期期间被编程，并且在将i值数据编程到三个或更多个存储器单元之后，将（i + 1）值数据编程到三个或更多个存储单元中的特定存储器单元 更多的记忆体细胞。

公开(公告)号：US07548457B2

公开(公告)日：2009-06-16

申请号：US11607991

申请日：2006-12-04

申请人： Sang-Gu Kang ,  Young-Ho Lim

发明人： Sang-Gu Kang ,  Young-Ho Lim

IPC分类号： G11C11/34

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/3418

摘要： In a method of programming a nonvolatile memory device including a plurality of n-valued nonvolatile memory cells arranged in a matrix, wherein n is a natural number greater than or equal to two (2), the method includes; programming i-valued data to three or more memory cells contiguously arranged along a first direction of the matrix before programming (i+1)-valued data to any of the three or more memory cells, wherein i is less than n, and wherein the three or more memory cells are programmed during three or more respectively distinct program periods, and after programming the i-valued data to the three or more memory cells, programming (i+1)-valued data to a particular memory cell among the three or more memory cells.

摘要翻译： 在一种非易失性存储器件的编程方法中，包括以矩阵形式排列的多个n值非易失性存储器单元，其中n为大于或等于2（2）的自然数，该方法包括： 将i值数据编程到沿着矩阵的第一方向连续排列的三个或更多个存储器单元，然后将其编程（i + 1）值数据分配给三个或更多个存储器单元中的任何一个，其中i小于n，并且其中 三个或更多个存储器单元在三个或更多个分别不同的程序周期期间被编程，并且在将i值数据编程到三个或更多个存储器单元之后，将（i + 1）值数据编程到三个或更多个存储单元中的特定存储器单元 更多的记忆体细胞。

公开(公告)号：US20080056007A1

公开(公告)日：2008-03-06

申请号：US11657697

申请日：2007-01-25

申请人： Dong-Ku Kang ,  Young-Ho Lim ,  Sang-Gu Kang

发明人： Dong-Ku Kang ,  Young-Ho Lim ,  Sang-Gu Kang

IPC分类号： G11C11/34

CPC分类号： G11C16/3454 ,  G11C11/5628 ,  G11C2211/5621 ,  G11C2211/5642 ,  G11C2211/5643

摘要： A method is for programming a flash memory device which includes a plurality of memory cells storing multi-bit data representing one of a plurality of states. The method includes programming the multi-bit data into selected memory cells of the plurality of memory cells, the programming including a first verify-reading operation performed by a first verifying voltage, determining whether to execute a reprogramming operation for each of the selected memory cells, and reprogramming the selected memory cells in accordance with the determination. The reprogramming of the selected memory cells includes a second verify-reading operation performed by a second verifying voltage, the second verifying voltage being higher than the first verifying voltage.

摘要翻译： 一种用于对闪速存储器件进行编程的方法，该闪存器件包括存储表示多种状态之一的多位数据的多个存储器单元。 该方法包括将多位数据编程到多个存储单元的选定存储单元中，该程序包括由第一验证电压执行的第一验证读取操作，确定是否对所选存储单元中的每一个执行重编程操作 ，并且根据该确定重新编程所选择的存储单元。 所选择的存储单元的重新编程包括由第二验证电压执行的第二验证读取操作，第二验证电压高于第一验证电压。