公开(公告)号：US07634776B2

公开(公告)日：2009-12-15

申请号：US11127687

申请日：2005-05-12

申请人： Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Manish Singhal ,  Dileep Kumar Tamia ,  Dinesh Kumar ,  Aditya Kulkarni ,  Murali Babu Muthukrishnan

发明人： Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Manish Singhal ,  Dileep Kumar Tamia ,  Dinesh Kumar ,  Aditya Kulkarni ,  Murali Babu Muthukrishnan

IPC分类号： G06F9/46 ,  G06F9/30 ,  G06T1/20

CPC分类号： G06F15/7842 ,  H04N19/154 ,  H04N19/436 ,  H04N19/61 ,  H04N19/80

摘要： A method for designing a multi-threaded processing operation that includes, e.g., multimedia encoding/decoding, uses an architecture having multiple processors and optional hardware accelerators. The method includes the steps of: identifying a desired chronological sequence of processing stages for processing input data including identifying interdependencies of said processing stages; allotting each said processing sage to a processor; staggering the processing to accommodate the interdependencies; selecting a processing operation based on said allotting to arrive at a subset of possible pipelines that offer low average processing time; and, choosing one design pipeline from said subset to result in overall timing reduction to complete said processing operation. The invention provides a multi-threaded processing pipeline that is applicable in a System-on-Chip (SoC) using a DSP and shared resources such as DMA controller and on-chip memory, for increasing the throughput. The invention also provides an article which is programmed to execute the method.

摘要翻译： 用于设计包括例如多媒体编码/解码的多线程处理操作的方法使用具有多个处理器和可选硬件加速器的架构。 该方法包括以下步骤：识别用于处理输入数据的处理阶段的期望时间序列，包括识别所述处理阶段的相互依赖性; 将每个所述处理鼠标分配给处理器; 惊ering处理以适应相互依存关系; 基于所述分配来选择处理操作以得到提供较低平均处理时间的可能管线的子集; 并且从所述子集中选择一个设计流水线以产生总体时序减少以完成所述处理操作。 本发明提供了一种多线程处理流水线，其可应用于使用DSP和诸如DMA控制器和片上存储器之类的共享资源的片上系统（SoC），以提高吞吐量。 本发明还提供了一种被编程以执行该方法的物品。

公开(公告)号：US07782951B2

公开(公告)日：2010-08-24

申请号：US11126533

申请日：2005-05-11

申请人： Murali Babu Muthukrishnan ,  Arvind Raman ,  Bhavani Gopalakrishna Rao ,  Manish Singhal ,  Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Dileep Kumar Tamia

发明人： Murali Babu Muthukrishnan ,  Arvind Raman ,  Bhavani Gopalakrishna Rao ,  Manish Singhal ,  Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Dileep Kumar Tamia

IPC分类号： H04N7/12

CPC分类号： H04N19/53 ,  H04N5/145

摘要： A motion estimation algorithm finds the best match for a given block or macroblock so that the resulting error signal has very low energy level which is computed, for e.g., by the SAD method. The motion estimation algorithm also provides for an optional sub-pixel level estimation and an inter4v search, and allows for restricting the number of searches for a Frame-frame ME (motion estimation) using Top-Top and Bottom-Bottom field MEs. The algorithm provides for a selective early exit and enables selecting a suitable search area with N candidate points (4 to 8) for starting the search. The search is conducted progressively till a minimum error signal (low energy level signal) is reached. The candidate points for search may be in a diamond shaped configuration, and there may be a plurality of successive diamond configurations, the number of which is configurable. The invention has application in MPEG-4 and H.264 standards.

摘要翻译： 运动估计算法找到给定块或宏块的最佳匹配，使得所得到的误差信号具有非常低的能级，例如通过SAD方法计算。 运动估计算法还提供了可选的子像素级估计和inter4v搜索，并且允许使用Top-Top和Bottom-Bottom-field ME限制对帧帧ME（运动估计）的搜索次数。 该算法提供选择性提前退出，并且使得能够选择具有用于开始搜索的N个候选点（4至8）的合适的搜索区域。 搜索逐渐进行，直到达到最小误差信号（低能级信号）。 用于搜索的候选点可以是菱形配置，并且可以存在多个连续的菱形配置，其数量是可配置的。 本发明适用于MPEG-4和H.264标准。

公开(公告)号：US20050262510A1

公开(公告)日：2005-11-24

申请号：US11127687

申请日：2005-05-12

申请人： Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Manish Singhal ,  Dileep Tamia ,  Dinesh Kumar ,  Aditya Kulkarni ,  Murali Muthukrishnan

发明人： Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Manish Singhal ,  Dileep Tamia ,  Dinesh Kumar ,  Aditya Kulkarni ,  Murali Muthukrishnan

IPC分类号： G06F9/46

CPC分类号： G06F15/7842 ,  H04N19/154 ,  H04N19/436 ,  H04N19/61 ,  H04N19/80

摘要： A method for designing a multi-threaded processing operation that includes, e.g., multimedia encoding/decoding, uses an architecture having multiple processors and optional hardware accelerators. The method includes the steps of: identifying a desired chronological sequence of processing stages for processing input data including identifying interdependencies of said processing stages; allotting each said processing sage to a processor; staggering the processing to accommodate the interdependencies; selecting a processing operation based on said allotting to arrive at a subset of possible pipelines that offer low average processing time; and, choosing one design pipeline from said subset to result in overall timing reduction to complete said processing operation. The invention provides a multi-threaded processing pipeline that is applicable in a System-on-Chip (SoC) using a DSP and shared resources such as DMA controller and on-chip memory, for increasing the throughput. The invention also provides an article which is programmed to execute the method.

摘要翻译： 用于设计包括例如多媒体编码/解码的多线程处理操作的方法使用具有多个处理器和可选硬件加速器的架构。 该方法包括以下步骤：识别用于处理输入数据的处理阶段的期望时间序列，包括识别所述处理阶段的相互依赖性; 将每个所述处理鼠标分配给处理器; 惊ering处理以适应相互依存关系; 基于所述分配来选择处理操作以得到提供较低平均处理时间的可能管线的子集; 并且从所述子集中选择一个设计流水线以产生总体时序减少以完成所述处理操作。 本发明提供了一种多线程处理流水线，其可应用于使用DSP和诸如DMA控制器和片上存储器之类的共享资源的片上系统（SoC），以提高吞吐量。 本发明还提供了一种被编程以执行该方法的物品。

公开(公告)号：US20050265454A1

公开(公告)日：2005-12-01

申请号：US11126533

申请日：2005-05-11

申请人： Murali Muthukrishnan ,  Arvind Raman ,  Bhavani Rao ,  Manish Singhal ,  Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Dileep Tamia

发明人： Murali Muthukrishnan ,  Arvind Raman ,  Bhavani Rao ,  Manish Singhal ,  Sankaranarayanan Parameswaran ,  Sriram Sethuraman ,  Dileep Tamia

IPC分类号： H04N5/14 ,  H04N7/12 ,  H04N7/26

CPC分类号： H04N19/53 ,  H04N5/145

摘要： A motion estimation algorithm finds the best match for a given block or macroblock so that the resulting error signal has very low energy level which is computed, for e.g., by the SAD method. The motion estimation algorithm also provides for an optional sub-pixel level estimation and an inter4v search, and allows for restricting the number of searches for a Frame-frame ME (motion estimation) using Top-Top and Bottom-Bottom field MEs. The algorithm provides for a selective early exit and enables selecting a suitable search area with N candidate points (4 to 8) for starting the search. The search is conducted progressively till a minimum error signal (low energy level signal) is reached. The candidate points for search may be in a diamond shaped configuration, and there may be a plurality of successive diamond configurations, the number of which is configurable. The invention has application in MPEG-4 and H.264 standards.

摘要翻译： 运动估计算法找到给定块或宏块的最佳匹配，使得所得到的误差信号具有非常低的能级，例如通过SAD方法计算。 运动估计算法还提供了可选的子像素级估计和inter4v搜索，并且允许使用Top-Top和Bottom-Bottom-field ME限制对帧帧ME（运动估计）的搜索次数。 该算法提供选择性提前退出，并且使得能够选择具有用于开始搜索的N个候选点（4至8）的合适的搜索区域。 搜索逐渐进行，直到达到最小误差信号（低能级信号）。 用于搜索的候选点可以是菱形配置，并且可以存在多个连续的菱形配置，其数量是可配置的。 本发明适用于MPEG-4和H.264标准。