公开(公告)号：US11522358B2

公开(公告)日：2022-12-06

申请号：US16876268

申请日：2020-05-18

Applicant: Schweitzer Engineering Laboratories, Inc.

Inventor： Lisa Gayle Nelms ,  Dean G. Stevens ,  Paul Stoaks

IPC: H02H7/20 ,  G05B19/042 ,  H02H1/00 ,  G06F12/14 ,  G06F13/16

Abstract: Systems, devices, and methods include protective functions in an electrical power system. For example, a processing subsystem may include a first processor and a second processor. The first processor and the second processor may operate independently. A memory subsystem may comprise a first memory section and a second memory section. A memory management subsystem may enable memory access between the first processor and the first memory section and disable memory access between the first processor and the second memory section. The memory management subsystem may further enable memory access between the second processor and the second memory section and disable memory access between the second processor and the first memory section. A protection subsystem may include the first processor and the first memory section and enable a protection function. The second processor and the second memory section may provide a second function that operates independently of the protection function.

公开(公告)号：US20210359508A1

公开(公告)日：2021-11-18

申请号：US16876268

申请日：2020-05-18

Applicant: Schweitzer Engineering Laboratories, Inc.

Inventor： Lisa Gayle Nelms ,  Dean G. Stevens ,  Paul Stoaks

IPC: H02H7/20 ,  H02H1/00 ,  G05B19/042

Abstract: Systems, devices, and methods include protective functions in an electrical power system. For example, a processing subsystem may include a first processor and a second processor. The first processor and the second processor may operate independently. A memory subsystem may comprise a first memory section and a second memory section. A memory management subsystem may enable memory access between the first processor and the first memory section and disable memory access between the first processor and the second memory section. The memory management subsystem may further enable memory access between the second processor and the second memory section and disable memory access between the second processor and the first memory section. A protection subsystem may include the first processor and the first memory section and enable a protection function. The second processor and the second memory section may provide a second function that operates independently of the protection function.