公开(公告)号：US10224066B1

公开(公告)日：2019-03-05

申请号：US15824317

申请日：2017-11-28

Applicant: Seagate Technology LLC

Inventor： Andrew J. Hakanson ,  Robbee L. Grimm ,  Greg A. Schmitz

IPC: G11B5/39 ,  G11B5/31 ,  G11B5/40 ,  G11B5/33

Abstract: A method includes depositing a plurality of layers over a substrate. The layers include read sensor layers and an electrically conductive layer substantially coplanar with the read sensor layers and substantially surrounding the read sensor layers. The electrically conductive layer is in contact with at least one of the read sensor layers. The electrically conductive layer provides an electrical path between the at least one of the read sensor layers and ground. The method further includes forming an isolation structure around the read sensor layers by removing a portion of the electrically conductive layer substantially surrounding the read sensor layers. The isolation structure is substantially coplanar with the read sensor layers and substantially surrounds the read sensor layers. The isolation structure breaks the electrical path between the at least one of the read sensor layers and the ground.