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公开(公告)号:US20220197802A1
公开(公告)日:2022-06-23
申请号:US17129863
申请日:2020-12-21
Applicant: Seagate Technology LLC
Inventor: Sivakumar Sambandan
IPC: G06F12/0815 , G06F13/40
Abstract: Cache coherency of a global address space of a cache can be maintained with one or more tier control units (TCUs). The global address space of the cache may be shared by multiple domains. Domains may include multiple controllers and a local interconnect operatively coupling the controllers to the cache. The local interconnect of each domain may maintain a cache coherency of a local address space of the cache shared by the controllers of the domain. The one or more TCUs may be operatively coupled to the local interconnects of the domains to maintain the cache coherency of the global address space.
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公开(公告)号:US11604731B2
公开(公告)日:2023-03-14
申请号:US17129863
申请日:2020-12-21
Applicant: Seagate Technology LLC
Inventor: Sivakumar Sambandan
IPC: G06F12/08 , G06F13/40 , G06F12/0815
Abstract: Cache coherency of a global address space of a cache can be maintained with one or more tier control units (TCUs). The global address space of the cache may be shared by multiple domains. Domains may include multiple controllers and a local interconnect operatively coupling the controllers to the cache. The local interconnect of each domain may maintain a cache coherency of a local address space of the cache shared by the controllers of the domain. The one or more TCUs may be operatively coupled to the local interconnects of the domains to maintain the cache coherency of the global address space.
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公开(公告)号:US09250995B2
公开(公告)日:2016-02-02
申请号:US13911443
申请日:2013-06-06
Applicant: Seagate Technology LLC
Inventor: Jackson L. Ellis , Earl T. Cohen , Sivakumar Sambandan , Jeonghun Kim , Stephen D. Hanna
CPC classification number: G06F11/1016 , G06F11/1008 , G06F11/1044 , G06F11/1076 , G11C29/00
Abstract: A method for protecting data in a memory is disclosed. The method generally includes steps (A) to (D). Step (A) converts a logical address of one of a plurality of logical units to a physical address of a corresponding one of a plurality of physical units. Each physical unit is configured to store (i) data from a corresponding one of the logical units, (ii) respective error correction information and (iii) respective verification information. Step (B) writes a particular one of the physical units to the memory. Step (C) reads a portion of the particular physical unit from the memory. The portion includes the respective verification information. The respective verification information includes an indication of the logical address. Step (D) verifies the writing according to the respective verification information in the portion.
Abstract translation: 公开了一种用于保护存储器中的数据的方法。 该方法通常包括步骤(A)至(D)。 步骤(A)将多个逻辑单元中的一个逻辑单元的逻辑地址转换为多个物理单元中相应一个的物理地址。 每个物理单元被配置为存储(i)来自逻辑单元中的相应一个的数据,(ii)各自的纠错信息和(iii)相应的验证信息。 步骤(B)将特定的一个物理单元写入存储器。 步骤(C)从存储器读取特定物理单元的一部分。 该部分包括相应的验证信息。 相应的验证信息包括逻辑地址的指示。 步骤(D)根据该部分中的相应验证信息验证写入。
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