公开(公告)号：US07483289B2

公开(公告)日：2009-01-27

申请号：US11195337

申请日：2005-08-02

Applicant: Seema Jain

Inventor： Seema Jain

IPC: G11C11/00

CPC classification number: G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1087 ,  G11C7/1096 ,  G11C7/22 ,  G11C11/413

Abstract: An improved synchronous SRAM capable of faster read-modify-write cycle time using separate input and output terminals. It describes the circuitry for performing a RMW operation in a memory module at high frequency in a nanometer technology. A byte write enable bus is incorporated into the device so as to provide the flexibility of modification and correction at selective columns, keeping rest of the columns unaltered. The termination of read operation and the triggering of write operation is done by the activation of same signal. Also described is the provision for tuning the circuitry for triggering write operation depending on the time taken by the controller to modify and revise the read-out data.

Abstract translation: 一种改进的同步SRAM，能够使用单独的输入和输出端子更快地读取 - 修改 - 写入周期时间。 它描述了在纳米技术中以高频率在存储器模块中执行RMW操作的电路。 一个字节写使能总线被并入设备，以便提供选择性列修改和修正的灵活性，保持列不变。 读操作的终止和写操作的触发是通过激活相同的信号完成的。 还描述了根据控制器修改和修改读出数据所花费的时间来调整用于触发写入操作的电路的规定。

公开(公告)号：US20060034132A1

公开(公告)日：2006-02-16

申请号：US11195337

申请日：2005-08-02

Applicant: Seema Jain

Inventor： Seema Jain

IPC: G11C7/10

CPC classification number: G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1087 ,  G11C7/1096 ,  G11C7/22 ,  G11C11/413

Abstract: An improved synchronous SRAM capable of faster read-modify-write cycle time using separate input and output terminals. It describes the circuitry for performing a RMW operation in a memory module at high frequency in a nanometer technology. A byte write enable bus is incorporated into the device so as to provide the flexibility of modification and correction at selective columns, keeping rest of the columns unaltered. The termination of read operation and the triggering of write operation is done by the activation of same signal. Also described is the provision for tuning the circuitry for triggering write operation depending on the time taken by the controller to modify and revise the read-out data.