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1.发明授权Pulse signal generator for ultra-wideband radio transception and radio transceiver having the same 有权用于超宽带无线电收发的脉冲信号发生器和具有相同功能的无线电收发器公开(公告)号：US07508860B2
公开(公告)日：2009-03-24
申请号：US11004383
申请日：2004-12-03
申请人： Seok-Bong Hyun , Geum-Young Tak , Byung Jo Kim , Kyung Hwan Park , Jeen Hur , Seong-Su Park
发明人： Seok-Bong Hyun , Geum-Young Tak , Byung Jo Kim , Kyung Hwan Park , Jeen Hur , Seong-Su Park
IPC分类号： H04B1/00
CPC分类号： H04B1/7174 , H04B1/7183 , H04L2025/03375 , H04L2025/0349
摘要： Provided are a pulse signal generator for UWB radio transception and a radio transceiver having the same. The pulse signal generator includes: an envelope generator generating a plurality of envelope signals; a local oscillator array composed of a plurality of high frequency oscillators, each outputting two oscillation signals having a phase difference from each other; a multiplier array receiving the envelope signals and the oscillation signals and outputting signals obtained by respectively multiplying the envelope signals by the oscillation signals; and an I channel adder and a Q channel adder outputting an I channel pulse signal and a Q channel pulse signal by adding output signals having the same phase components among the signals output from the multiplier array, respectively.
摘要翻译： 提供了一种用于UWB无线电收发的脉冲信号发生器和具有该脉冲信号发生器的无线收发器。 脉冲信号发生器包括：产生多个包络信号的包络发生器; 由多个高频振荡器组成的本地振荡器阵列，每个振荡器输出具有彼此相位差的两个振荡信号; 接收包络信号和振荡信号的乘法器阵列，并输出通过将包络信号乘以振荡信号而获得的信号; 以及I通道加法器和Q通道加法器，分别通过将从乘法器阵列输出的信号中相加相位分量的输出信号相加，输出I通道脉冲信号和Q通道脉冲信号。
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2.发明申请Pulse signal generator for ultra-wideband radio transception and radio transceiver having the same 有权用于超宽带无线电收发的脉冲信号发生器和具有相同功能的无线电收发器公开(公告)号：US20050141602A1
公开(公告)日：2005-06-30
申请号：US11004383
申请日：2004-12-03
申请人： Seok-Bong Hyun , Geum-Young Tak , Byung Kim , Kyung Park , Jeen Hur , Seong-Su Park
发明人： Seok-Bong Hyun , Geum-Young Tak , Byung Kim , Kyung Park , Jeen Hur , Seong-Su Park
CPC分类号： H04B1/7174 , H04B1/7183 , H04L2025/03375 , H04L2025/0349
摘要： Provided are a pulse signal generator for UWB radio transception and a radio transceiver having the same. The pulse signal generator includes: an envelope generator generating a plurality of envelope signals; a local oscillator array composed of a plurality of high frequency oscillators, each outputting two oscillation signals having a phase difference from each other; a multiplier array receiving the envelope signals and the oscillation signals and outputting signals obtained by respectively multiplying the envelope signals by the oscillation signals; and an I channel adder and a Q channel adder outputting an I channel pulse signal and a Q channel pulse signal by adding output signals having the same phase components among the signals output from the multiplier array, respectively.
摘要翻译： 提供了一种用于UWB无线电侦听的脉冲信号发生器和具有该脉冲信号发生器的无线电收发器。 脉冲信号发生器包括：产生多个包络信号的包络发生器; 由多个高频振荡器组成的本地振荡器阵列，每个振荡器输出具有彼此相位差的两个振荡信号; 接收包络信号和振荡信号的乘法器阵列，并输出通过将包络信号乘以振荡信号而获得的信号; 以及I通道加法器和Q通道加法器，分别通过将从乘法器阵列输出的信号中相加相位分量的输出信号相加，输出I通道脉冲信号和Q通道脉冲信号。
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公开(公告)号：US20060055434A1
公开(公告)日：2006-03-16
申请号：US11023379
申请日：2004-12-29
IPC分类号： H03K9/06
CPC分类号： H03L7/0891 , H03D13/004
摘要： Provided is a phase frequency detector for use in a phase locked loop (PLL) or a delay locked loop (DLL), the phase frequency detector including: an UP signal output unit having a first stage operated according to a reference clock delayed by a predetermined time and a reset signal, a second stage operated according to the reference clock and an output of the first stage, and an inverter for inverting an output of the second stage; a DOWN signal output unit having: a first stage operated according to an outer clock delayed by a predetermined time and the reset signal, a second stage operated according to the outer clock and an output of the first stage, and an inverter for inverting an output of the second stage; and a logic gate logically combining the output of the second stage of the UP signal output unit and the output of the second stage of the DOWN signal output unit to generate the reset signal, thereby a phase range of the input signal with which an effective control signal can be obtained is wide so that low power consumption and low noise characteristics can be obtained due to fast phase lock, low power consumption of a dynamic logic, and fast signal transmission.
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公开(公告)号：US07053666B2
公开(公告)日：2006-05-30
申请号：US11023379
申请日：2004-12-29
CPC分类号： H03L7/0891 , H03D13/004
摘要： Provided is a phase frequency detector for use in a phase locked loop (PLL) or a delay locked loop (DLL), the phase frequency detector including: an UP signal output unit having a first stage operated according to a reference clock delayed by a predetermined time and a reset signal, a second stage operated according to the reference clock and an output of the first stage, and an inverter for inverting an output of the second stage; a DOWN signal output unit having: a first stage operated according to an outer clock delayed by a predetermined time and the reset signal, a second stage operated according to the outer clock and an output of the first stage, and an inverter for inverting an output of the second stage; and a logic gate logically combining the output of the second stage of the UP signal output unit and the output of the second stage of the DOWN signal output unit to generate the reset signal, thereby a phase range of the input signal with which an effective control signal can be obtained is wide so that low power consumption and low noise characteristics can be obtained due to fast phase lock, low power consumption of a dynamic logic, and fast signal transmission.
摘要翻译： 提供了一种用于锁相环（PLL）或延迟锁定环（DLL）的相位频率检测器，所述相位频率检测器包括：UP信号输出单元，具有根据延迟预定值的参考时钟操作的第一级 时间和复位信号，根据参考时钟操作的第二级和第一级的输出;以及用于反转第二级的输出的反相器; DOWN信号输出单元，具有：根据延迟预定时间的外部时钟和复位信号操作的第一级，根据外部时钟操作的第二级和第一级的输出;以及用于将输出 的第二阶段 逻辑门逻辑地组合UP信号输出单元的第二级的输出和DOWN信号输出单元的第二级的输出，以产生复位信号，从而使输入信号的相位范围成为有效控制 可以获得宽的信号，由于快速锁相，动态逻辑的低功耗和快速信号传输，可以获得低功耗和低噪声特性。
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