公开(公告)号：US07893900B2

公开(公告)日：2011-02-22

申请号：US11648356

申请日：2006-12-28

申请人： Seok-Su Kim ,  Sun-Young Choi

发明人： Seok-Su Kim ,  Sun-Young Choi

IPC分类号： G09G5/00

CPC分类号： G09G3/3614 ,  G09G3/3688 ,  G09G2320/0209

摘要： A liquid crystal display device includes a liquid crystal panel, including multiple pixels, and a driving circuit. The pixels are driven according to a first driving pattern. The driving circuit monitors the liquid crystal panel for a cross-talk condition. The driving circuit generates a signal and changes the driving pattern to an alternate driving pattern when a cross-talk condition is detected in the liquid crystal panel.

摘要翻译： 液晶显示装置包括具有多个像素的液晶面板和驱动电路。 像素根据第一驱动模式被驱动。 驱动电路监视液晶面板的串扰状况。 当在液晶面板中检测到串扰条件时，驱动电路产生信号并将驱动模式改变为备用驱动模式。

公开(公告)号：US20080001891A1

公开(公告)日：2008-01-03

申请号：US11648356

申请日：2006-12-28

申请人： Seok-Su Kim ,  Sun-Young Choi

发明人： Seok-Su Kim ,  Sun-Young Choi

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/3688 ,  G09G2320/0209

摘要： A liquid crystal display device includes a liquid crystal panel, including multiple pixels, and a driving circuit. The pixels are driven according to a first driving pattern. The driving circuit monitors the liquid crystal panel for a cross-talk condition. The driving circuit generates a signal and changes the driving pattern to an alternate driving pattern when a cross-talk condition is detected in the liquid crystal panel.

摘要翻译： 液晶显示装置包括具有多个像素的液晶面板和驱动电路。 像素根据第一驱动模式被驱动。 驱动电路监视液晶面板的串扰状况。 当在液晶面板中检测到串扰条件时，驱动电路产生信号并将驱动模式改变为备用驱动模式。

公开(公告)号：US20060019450A1

公开(公告)日：2006-01-26

申请号：US11186397

申请日：2005-07-21

申请人： Seok-Su Kim

发明人： Seok-Su Kim

IPC分类号： H01L21/44 ,  H01L21/336 ,  H01L21/8238

CPC分类号： H01L21/76879 ,  H01L21/28525 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823425

摘要： An exemplary method for manufacturing a semiconductor device includes: forming an insulating layer over a semiconductor substrate having a gate insulating layer, a gate, and a spacer, respectively formed thereabove and one or more junction regions formed therein so as to fill a full height of a gap between gates; forming a contact hole partially exposing the junction region(s) by etching the Insulating layer; and selectively forming a silicon layer on an exposed portion of the junction region at a bottom of the contact hole.

摘要翻译： 用于制造半导体器件的示例性方法包括：在分别形成在其上的具有栅极绝缘层，栅极和间隔物的半导体衬底上形成绝缘层，以及形成在其中的一个或多个结区域，以便填满全部高度 门之间的差距 通过蚀刻绝缘层形成部分地暴露接合区域的接触孔; 并且在接触孔的底部的接合区域的暴露部分上选择性地形成硅层。

公开(公告)号：US06818499B2

公开(公告)日：2004-11-16

申请号：US10624676

申请日：2003-07-23

申请人： Seok-Su Kim

发明人： Seok-Su Kim

IPC分类号： H01L218242

CPC分类号： H01L28/60 ,  H01L21/32136

摘要： A method for forming a metal-insulator-metal (“MIM”) capacitor is provided. In the method, a first metal film and an dielectric film are sequentially formed on a semiconductor substrate. A trench through which the first metal film is exposed is formed by patterning the dielectric film. A insulation film and a second metal film are sequentially formed on a surface of the trench and the dielectric film. A mask pattern defining a capacitor forming area is provided on the second metal film. The second metal film and the insulation film are etched by using the mask pattern and the dielectric film as an etching barrier and an etching stopper layer, respectively, to form an upper electrode. With the mask pattern removed, a lower electrode is formed by patterning the dielectric film and the first metal film.

摘要翻译： 提供了形成金属 - 绝缘体 - 金属（“MIM”）电容器的方法。 在该方法中，在半导体基板上依次形成第一金属膜和电介质膜。 通过图案化电介质膜来形成暴露第一金属膜的沟槽。 绝缘膜和第二金属膜依次形成在沟槽和电介质膜的表面上。 在第二金属膜上设置限定电容器形成区域的掩模图案。 通过使用掩模图案和电介质膜分别作为蚀刻阻挡层和蚀刻停止层来分别蚀刻第二金属膜和绝缘膜，以形成上电极。 通过去除掩模图案，通过图案化电介质膜和第一金属膜来形成下电极。

公开(公告)号：US08976101B2

公开(公告)日：2015-03-10

申请号：US11605205

申请日：2006-11-28

申请人： Chung-Ok Chang ,  Seok-Su Kim ,  Kwang-Won Yang

发明人： Chung-Ok Chang ,  Seok-Su Kim ,  Kwang-Won Yang

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G2310/0245 ,  G09G2330/02 ,  G09G2330/027 ,  G09G2330/12

摘要： A display device includes a display panel including a gate line and a data line, a gate driver that outputs a gate voltage to the gate line according to a gate output enable signal, a data driver that outputs a data voltage to the data line, a detecting circuit that detects a state of a clock signal. The state of the clock signal includes a normal or abnormal state. A masking circuit performs a masking operation for the gate output enable signal according to the state of the clock signal and a level of a reset signal, where the level of the reset signal includes a first or second level corresponding to a power-on or off of the display device, respectively.

摘要翻译： 一种显示装置，包括：栅极线和数据线的显示面板;根据栅极输出使能信号向栅极线输出栅极电压的栅极驱动器;向数据线输出数据电压的数据驱动器; 检测电路，检测时钟信号的状态。 时钟信号的状态包括正常或异常状态。 屏蔽电路根据时钟信号的状态和复位信号的电平对门输出使能信号执行屏蔽操作，其中复位信号的电平包括对应于电源接通或关断的第一或第二电平 的显示装置。

公开(公告)号：US20060017116A1

公开(公告)日：2006-01-26

申请号：US11186396

申请日：2005-07-21

申请人： Seok-Su Kim

发明人： Seok-Su Kim

IPC分类号： H01L29/792

CPC分类号： H01L21/76802 ,  H01L21/28525 ,  H01L21/76801 ,  H01L21/76837 ,  H01L21/823425

摘要： A method for manufacturing a semiconductor device includes forming a gate insulating layer, a gate and a protective layer on a semiconductor substrate, forming a spacer on lateral sides of the protective layer and the gate, forming one or more junction regions in the semiconductor substrate at sides of the gate, partially filling a gap between adjacent gates by selectively forming a conductive layer on an exposed portion of the semiconductor substrate between the adjacent gates, forming an insulating layer over the semiconductor substrate so as to fill a full height of the gap between the adjacent gates, and forming a contact hole partially exposing the conductive layer by etching the insulating layer.

摘要翻译： 一种半导体器件的制造方法包括在半导体衬底上形成栅极绝缘层，栅极和保护层，在保护层和栅极的侧面形成间隔物，在半导体衬底中形成一个或多个结区域 通过在相邻栅极之间的半导体衬底的暴露部分上选择性地形成导电层，在相邻栅极之间部分地填充间隙，在半导体衬底上形成绝缘层，以便填充半导体衬底之间的间隙的全高 并且通过蚀刻绝缘层形成部分暴露导电层的接触孔。

公开(公告)号：US08436849B2

公开(公告)日：2013-05-07

申请号：US12822827

申请日：2010-06-24

申请人： Soo-Ho Jang ,  Seok-Su Kim ,  Tae-Young Jung

发明人： Soo-Ho Jang ,  Seok-Su Kim ,  Tae-Young Jung

IPC分类号： G06F3/038

CPC分类号： G09G3/3677 ,  G09G2320/0247

摘要： The present invention relates to a circuit for driving a liquid crystal display device in which no multi-flicker preventive signal FLK, but only single flicker preventive signal FLK, is used for reducing numbers of pins of a timing controller and a level shifter. The circuit for driving a liquid crystal display device includes a liquid crystal panel having a plurality of pixel regions for displaying an image, a timing controller for generating one flicker preventive signal and a plurality of clock signals and gate control signals to control driving timing of a gate driver, a gate pulse modulation unit for logically operating the one flicker preventive signal and the plurality of clock signals from the timing controller to generate a plurality of flicker preventive signals, and modulating a gate high voltage from the timing controller according to each of the plurality of flicker preventive signals generated thus to generate a plurality of modulated gate on voltages; a level shifter unit for changing the plurality of clock signals from the timing controller according to the plurality of modulated gate on voltages from the gate pulse modulation unit and a gate low voltage from the timing controller to generate a plurality of level shifted and modulated clock signals; and a gate driver for driving gate lines on the liquid crystal panel according to the a plurality of level shifted and modulated clock signals.

摘要翻译： 本发明涉及一种用于驱动液晶显示装置的电路，其中不使用多闪烁防止信号FLK，而仅使用单个防闪烁信号FLK来减少定时控制器和电平转换器的引脚数。 用于驱动液晶显示装置的电路包括具有用于显示图像的多个像素区域的液晶面板，用于产生一个防闪烁信号的定时控制器，以及多个时钟信号和门控制信号，以控制液晶显示装置的驱动定时 栅极驱动器，门脉冲调制单元，用于逻辑地操作来自定时控制器的一个防闪烁信号和多个时钟信号，以产生多个防闪烁信号，并且根据每个的时序控制器调制栅极高电压 多个防止闪烁信号产生，从而产生多个调制栅极电压; 电平移位器单元，用于根据来自门脉冲调制单元的多个调制栅极导通电压和来自定时控制器的栅极低电压，从定时控制器改变多个时钟信号，以产生多个电平移位和调制时钟信号 ; 以及用于根据多个电平移位和调制时钟信号在液晶面板上驱动栅极线的栅极驱动器。

公开(公告)号：US20110157148A1

公开(公告)日：2011-06-30

申请号：US12822827

申请日：2010-06-24

申请人： Soo-Ho Jang ,  Seok-Su Kim ,  Tae-Young Jung

发明人： Soo-Ho Jang ,  Seok-Su Kim ,  Tae-Young Jung

IPC分类号： G06F3/038

CPC分类号： G09G3/3677 ,  G09G2320/0247

摘要： The present invention relates to a circuit for driving a liquid crystal display device in which no multi-flicker preventive signal FLK, but only single flicker preventive signal FLK, is used for reducing numbers of pins of a timing controller and a level shifter. The circuit for driving a liquid crystal display device includes a liquid crystal panel having a plurality of pixel regions for displaying an image, a timing controller for generating one flicker preventive signal and a plurality of clock signals and gate control signals to control driving timing of a gate driver, a gate pulse modulation unit for logically operating the one flicker preventive signal and the plurality of clock signals from the timing controller to generate a plurality of flicker preventive signals, and modulating a gate high voltage from the timing controller according to each of the plurality of flicker preventive signals generated thus to generate a plurality of modulated gate on voltages; a level shifter unit for changing the plurality of clock signals from the timing controller according to the plurality of modulated gate on voltages from the gate pulse modulation unit and a gate low voltage from the timing controller to generate a plurality of level shifted and modulated clock signals; and a gate driver for driving gate lines on the liquid crystal panel according to the a plurality of level shifted and modulated clock signals.

摘要翻译： 本发明涉及一种用于驱动液晶显示装置的电路，其中不使用多闪烁防止信号FLK，而仅使用单个防闪烁信号FLK来减少定时控制器和电平转换器的引脚数。 用于驱动液晶显示装置的电路包括具有用于显示图像的多个像素区域的液晶面板，用于产生一个防闪烁信号的定时控制器和多个时钟信号和门控制信号，以控制液晶显示装置的驱动定时 栅极驱动器，门脉冲调制单元，用于逻辑地操作来自定时控制器的一个防闪烁信号和多个时钟信号，以产生多个防闪烁信号，并且根据每个的时序控制器调制栅极高电压 多个防止闪烁信号产生，从而产生多个调制栅极电压; 电平移位器单元，用于根据来自门脉冲调制单元的多个调制栅极导通电压和来自定时控制器的栅极低电压，从定时控制器改变多个时钟信号，以产生多个电平移位和调制时钟信号 ; 以及用于根据多个电平移位和调制的时钟信号在液晶面板上驱动栅极线的栅极驱动器。

公开(公告)号：US08178441B2

公开(公告)日：2012-05-15

申请号：US11186396

申请日：2005-07-21

申请人： Seok-Su Kim

发明人： Seok-Su Kim

IPC分类号： H01L21/44 ,  H01L21/4763

CPC分类号： H01L21/76802 ,  H01L21/28525 ,  H01L21/76801 ,  H01L21/76837 ,  H01L21/823425

摘要： A method for manufacturing a semiconductor device includes forming a gate insulating layer, a gate and a protective layer on a semiconductor substrate, forming a spacer on lateral sides of the protective layer and the gate, forming one or more junction regions in the semiconductor substrate at sides of the gate, partially filling a gap between adjacent gates by selectively forming a conductive layer on an exposed portion of the semiconductor substrate between the adjacent gates, forming an insulating layer over the semiconductor substrate so as to fill a full height of the gap between the adjacent gates, and forming a contact hole partially exposing the conductive layer by etching the insulating layer.

摘要翻译： 一种半导体器件的制造方法包括在半导体衬底上形成栅极绝缘层，栅极和保护层，在保护层和栅极的侧面形成间隔物，在半导体衬底中形成一个或多个结区域 通过在相邻栅极之间的半导体衬底的暴露部分上选择性地形成导电层，在相邻栅极之间部分地填充间隙，在半导体衬底上形成绝缘层，以便填充半导体衬底之间的间隙的全高 并且通过蚀刻绝缘层形成部分暴露导电层的接触孔。

公开(公告)号：US07432182B2

公开(公告)日：2008-10-07

申请号：US11186397

申请日：2005-07-21

申请人： Seok-Su Kim

发明人： Seok-Su Kim

IPC分类号： H01L21/3205

CPC分类号： H01L21/76879 ,  H01L21/28525 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823425

摘要： An exemplary method for manufacturing a semiconductor device includes: forming an insulating layer over a semiconductor substrate having a gate insulating layer, a gate, and a spacer, respectively formed thereabove and one or more junction regions formed therein so as to fill a full height of a gap between gates; forming a contact hole partially exposing the junction region(s) by etching the insulating layer; and selectively forming a silicon layer on an exposed portion of the junction region at a bottom of the contact hole.

摘要翻译： 用于制造半导体器件的示例性方法包括：在分别形成在其上的具有栅极绝缘层，栅极和间隔物的半导体衬底上形成绝缘层，以及形成在其中的一个或多个结区域，以便填满全部高度 门之间的差距 通过蚀刻绝缘层形成部分地暴露接合区域的接触孔; 并且在接触孔的底部的接合区域的暴露部分上选择性地形成硅层。