公开(公告)号：US20190171038A1

公开(公告)日：2019-06-06

申请号：US16302048

申请日：2017-06-28

Applicant: Seong Jun LEE ,  Hyun Seung LEE ,  Hyun Jeong LEE

Inventor： Seong Jun LEE ,  Hyun Seung LEE ,  Hyun Jeong LEE

IPC: G02C7/06 ,  G02C7/04 ,  G02C7/02

Abstract: The present invention relates to a contact lens for presbyopia and, more specifically, to a contact lens for presbyopia, providing both a far-distance vision area and a near-distance vision area in one contact lens, and continuously forming a lens magnification of the far-distance vision area and the near-distance vision area of the dominant eye and the non-dominant eye while changing the sizes of the far-distance vision area and the near-distance vision area of two eyes according to the dominant eye and the non-dominant eye, such that an intermediate-distance area is partially overlapped, thereby continuously providing a near-distance vision area at a far distance by a neural summation phenomenon that selects a clearly visible image in both eyes.

公开(公告)号：US20090115474A1

公开(公告)日：2009-05-07

申请号：US11964821

申请日：2007-12-27

Applicant: Seong Jun LEE

Inventor： Seong Jun LEE

IPC: H03L7/06

CPC classification number: H03L7/0812

Abstract: A clock synchronization circuit and a clock synchronization method which generate an internal clock synchronized to an external clock is presented. The circuit and method include a clock enable control circuit generating a clock enable control signal controlled by a power supply voltage and a power-down signal. The circuit and method also include a clock generating circuit receiving an input clock which selectively generates an internal clock synchronized to an external clock using the input clock using the clock enable control signal. Whereupon, a locking failure can be prevented by performing a phase update operation selectively in accordance with whether the power supply voltage is varied or not in the power-down mode. Furthermore, current consumption can be reduced by controlling phase update time in accordance with a variable magnitude of the power supply voltage.

Abstract translation: 提出了一种产生与外部时钟同步的内部时钟的时钟同步电路和时钟同步方法。 电路和方法包括时钟使能控制电路，其产生由电源电压和掉电信号控制的时钟使能控制信号。 电路和方法还包括时钟发生电路，其接收输入时钟，该输入时钟使用时钟使能控制信号使用输入时钟选择性地产生与外部时钟同步的内部时钟。 于是，通过根据在掉电模式下电源电压是否变化来选择性地执行相位更新操作，可以防止锁定故障。 此外，通过根据电源电压的可变幅度控制相位更新时间，可以减少电流消耗。