Architecture and instruction set for implementing advanced encryption standard (AES)
    1.
    发明授权
    Architecture and instruction set for implementing advanced encryption standard (AES) 有权
    实现高级加密标准(AES)的体系结构和指令集

    公开(公告)号:US08634550B2

    公开(公告)日:2014-01-21

    申请号:US13088088

    申请日:2011-04-15

    IPC分类号: H04L9/28 G06F15/00 G06F12/14

    摘要: A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.

    摘要翻译: 提供了一种用于通用处理器的灵活的aes指令,其使用n次循环执行aes加密或解密,其中n包括标准的一组轮{10,12,14}。 提供了一个参数,以允许选择一轮的类型,即是否是“最后一轮”。 除了标准aes之外,灵活的aes指令允许指定具有20发的AES类密码或“一轮”通过。

    Accelerating Diffie-Hellman key-exchange protocol with zero-biased exponent windowing
    2.
    发明授权
    Accelerating Diffie-Hellman key-exchange protocol with zero-biased exponent windowing 有权
    加速Diffie-Hellman密钥交换协议,零偏指数窗口

    公开(公告)号:US07760875B2

    公开(公告)日:2010-07-20

    申请号:US11480153

    申请日:2006-06-29

    IPC分类号: H04L9/00

    CPC分类号: H04L9/088 H04L9/0841

    摘要: A method for improving performance in exponentiation algorithms for encryption programs such as the Diffie-Hellman key-exchange protocol. The program determines if a standard exponentiation algorithm or an algorithm optimized for reduced memory are optimal for a given circumstance. The optimized algorithms may use zero-biased exponents to minimize the number of precomputed vectors needed and the number of multiplication operations required.

    摘要翻译: 一种用于提高加密程序(如Diffie-Hellman密钥交换协议)的求幂算法中的性能的方法。 该程序确定对于给定的情况,标准求幂算法还是针对减少的存储器优化的算法是最优的。 优化的算法可以使用零偏置指数来最小化所需的预计算向量的数量和所需的乘法运算的数量。

    Architecture and instruction set for implementing advanced encryption standard (AES)
    3.
    发明授权
    Architecture and instruction set for implementing advanced encryption standard (AES) 有权
    实现高级加密标准(AES)的体系结构和指令集

    公开(公告)号:US07949130B2

    公开(公告)日:2011-05-24

    申请号:US11648434

    申请日:2006-12-28

    IPC分类号: H04L9/28 G06F15/00 G06F12/14

    摘要: A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.

    摘要翻译: 提供了一种用于通用处理器的灵活的aes指令,其使用n次循环执行aes加密或解密,其中n包括标准的一组轮{10,12,14}。 提供了一个参数,以允许选择一轮的类型,即是否是“最后一轮”。 除了标准aes之外,灵活的aes指令允许指定具有20发的AES类密码或“一轮”通过。

    Determining a message residue
    4.
    发明申请
    Determining a message residue 有权
    确定消息残差

    公开(公告)号:US20090158132A1

    公开(公告)日:2009-06-18

    申请号:US12291621

    申请日:2008-11-12

    CPC分类号: G06F7/724 H03M13/091

    摘要: In one aspect, circuitry to determine a modular remainder with respect to a polynomial of a message comprised of a series of segment. In another aspect, circuitry to access at least a portion of a first number having a first endian format, determine a second number based on a bit reflection and shift of a third number having an endian format opposite to that of the first endian format, and perform a polynomial multiplication of the first number and the at least a portion of the first number.

    摘要翻译: 在一个方面,用于确定相对于包括一系列段的消息的多项式的模块余数的电路。 在另一方面,访问具有第一末端格式的第一号码的至少一部分的电路基于具有与第一末端格式相反的端格式的第三号码的位反射和位移来确定第二号码,以及 执行第一数字和第一数字的至少一部分的多项式相乘。

    ARCHITECTURE AND INSTRUCTION SET FOR IMPLEMENTING ADVANCED ENCRYPTION STANDARD (AES)
    5.
    发明申请
    ARCHITECTURE AND INSTRUCTION SET FOR IMPLEMENTING ADVANCED ENCRYPTION STANDARD (AES) 审中-公开
    实施高级加密标准(AES)的架构和指导

    公开(公告)号:US20140101460A1

    公开(公告)日:2014-04-10

    申请号:US14100970

    申请日:2013-12-09

    IPC分类号: G06F21/60

    摘要: A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.

    摘要翻译: 提供了一种用于通用处理器的灵活的aes指令,其使用n次循环执行aes加密或解密,其中n包括标准的一组轮{10,12,14}。 提供了一个参数,以允许选择一轮的类型,即是否是“最后一轮”。 除了标准aes之外,灵活的aes指令允许指定具有20发的AES类密码或“一轮”通过。

    Determining a Message Residue
    6.
    发明申请
    Determining a Message Residue 有权
    确定消息残差

    公开(公告)号:US20090019342A1

    公开(公告)日:2009-01-15

    申请号:US11777538

    申请日:2007-07-13

    IPC分类号: H03M13/15

    CPC分类号: H03M13/091

    摘要: A technique of determining a message residue includes accessing a message and simultaneously determining a set of modular remainders with respect to a polynomial for different respective segments of the message. The technique also includes determining a modular remainder with respect to the polynomial for the message based on the set of modular remainders and a set of constants determined prior to accessing the message. The modular remainder with respect to the polynomial for the message is stored in a memory.

    摘要翻译: 确定消息残差的技术包括访问消息并且同时确定关于消息的不同相应段的多项式的一组模块余数。 该技术还包括基于模块余数的集合和在访问消息之前确定的一组常数来确定关于消息的多项式的模块余数。 相对于消息的多项式的模数余数存储在存储器中。

    Architecture and instruction set for implementing advanced encryption standard (AES)
    7.
    发明申请
    Architecture and instruction set for implementing advanced encryption standard (AES) 有权
    实现高级加密标准(AES)的体系结构和指令集

    公开(公告)号:US20080159526A1

    公开(公告)日:2008-07-03

    申请号:US11648434

    申请日:2006-12-28

    IPC分类号: H04L9/28

    摘要: A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.

    摘要翻译: 提供了一种用于通用处理器的灵活的aes指令,其使用n次循环执行aes加密或解密,其中n包括标准的一组轮{10,12,14}。 提供了一个参数,以允许选择一轮的类型,即是否是“最后一轮”。 除了标准aes之外,灵活的aes指令允许指定具有20发的AES类密码或“一轮”通过。

    Accelerating diffie-hellman key-exchange protocol with zero-biased exponent windowing
    8.
    发明申请
    Accelerating diffie-hellman key-exchange protocol with zero-biased exponent windowing 有权
    用零偏置指数窗口加速diffie-hellman密钥交换协议

    公开(公告)号:US20080019512A1

    公开(公告)日:2008-01-24

    申请号:US11480153

    申请日:2006-06-29

    IPC分类号: H04L9/00

    CPC分类号: H04L9/088 H04L9/0841

    摘要: A method for improving performance in exponentiation algorithms for encryption programs such as the Diffie-Hellman key-exchange protocol. The program determines if a standard exponentiation algorithm or an algorithm optimized for reduced memory are optimal for a given circumstance. The optimized algorithms may use zero-biased exponents to minimize the number of precomputed vectors needed and the number of multiplication operations required.

    摘要翻译: 一种用于提高加密程序(如Diffie-Hellman密钥交换协议)的求幂算法中的性能的方法。 该程序确定对于给定的情况,标准求幂算法还是针对减少的存储器优化的算法是最优的。 优化的算法可以使用零偏置指数来最小化所需的预计算向量的数量和所需的乘法运算的数量。

    Method and a system for a quick verification rabin signature scheme
    9.
    发明申请
    Method and a system for a quick verification rabin signature scheme 失效
    用于快速验证rabin签名方案的方法和系统

    公开(公告)号:US20080002825A1

    公开(公告)日:2008-01-03

    申请号:US11479100

    申请日:2006-06-30

    IPC分类号: H04L9/30

    CPC分类号: H04L9/302 H04L9/3249

    摘要: A method and a system to perform a Quick Verification of a Rabin Signature (QVRS) is provided. In one embodiment, the signing party generates a Rabin signature S of an original message M using a public key N in the Rabin signature generating formula M=S2 mod N. In one embodiment, the signing party also generates a value q according to the formula q=floor(S2/N). In one embodiment, the signing party sends the original message M, the signature S, the public key N and the value q to the verifying party. In one embodiment, the verifying party verifies the integrity of the message M using the signature S, the public key N and the value q and the test equation M=S2−qN.

    摘要翻译: 提供了一种执行拉宾签名快速验证(QVRS)的方法和系统。 在一个实施例中,签名方使用Rabin签名生成公式M = S< 2> mod N中的公共密钥N来生成原始消息M的拉宾签名S.在一个实施例中,签约方也 根据公式q = floor(S 2 / N)生成值q。 在一个实施例中,签名方向验证方发送原始消息M,签名S,公钥N和值q。 在一个实施例中,验证方使用签名S,公开密钥N和值q以及测试方程M = S 2 -Q N验证消息M的完整性。

    Determining a message residue
    10.
    发明授权
    Determining a message residue 有权
    确定消息残差

    公开(公告)号:US08042025B2

    公开(公告)日:2011-10-18

    申请号:US12291621

    申请日:2008-11-12

    IPC分类号: H03M13/03

    CPC分类号: G06F7/724 H03M13/091

    摘要: In one aspect, circuitry to determine a modular remainder with respect to a polynomial of a message comprised of a series of segment. In another aspect, circuitry to access at least a portion of a first number having a first endian format, determine a second number based on a bit reflection and shift of a third number having an endian format opposite to that of the first endian format, and perform a polynomial multiplication of the first number and the at least a portion of the first number.

    摘要翻译: 在一个方面,用于确定相对于包括一系列段的消息的多项式的模块余数的电路。 在另一方面,访问具有第一末端格式的第一号码的至少一部分的电路基于具有与第一末端格式相反的端格式的第三号码的位反射和位移来确定第二号码,以及 执行第一数字和第一数字的至少一部分的多项式相乘。