公开(公告)号：US06864536B2

公开(公告)日：2005-03-08

申请号：US09740016

申请日：2000-12-20

申请人： Shi-Tron Lin ,  Wei-Fan Chen ,  Chenhsin Lien ,  Wan-Yun Lin

发明人： Shi-Tron Lin ,  Wei-Fan Chen ,  Chenhsin Lien ,  Wan-Yun Lin

IPC分类号： H01L27/02 ,  H01L27/12 ,  H01L23/62 ,  H01L29/76

CPC分类号： H01L27/0259 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/1087 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge (ESD) protection device includes a semiconductor layer, a source region formed in the layer, a drain region formed in the layer, a channel region in the layer between the source and drain regions, and a gate over the channel region. A plurality of current divider segments are distributed on the drain region and extend between the gate and drain contacts. The segments can be formed of polysilicon or a field oxide.

摘要翻译： 静电放电（ESD）保护装置包括半导体层，形成在该层中的源极区，形成在该层中的漏极区，在源极和漏极区之间的层中的沟道区，以及沟道区上的栅极。 多个分流器段分布在漏极区域上并在栅极和漏极触点之间延伸。 段可以由多晶硅或场氧化物形成。

公开(公告)号：US07009252B2

公开(公告)日：2006-03-07

申请号：US10353372

申请日：2003-01-28

申请人： Shi-Tron Lin ,  Wei-Fan Chen ,  Chenhsin Lien

发明人： Shi-Tron Lin ,  Wei-Fan Chen ,  Chenhsin Lien

IPC分类号： H01L26/62

CPC分类号： H01L27/027 ,  H01L27/0203

摘要： ESD protection devices and methods to form them are provided in this invention. By employing the thin gate oxide fabricated by a dual gate oxide process, ESD protection devices with a lower trigger voltage are provided. The NMOS for ESD protection according to the present invention has islands with thin gate oxides and a control gate with a thick gate oxide. These islands overlap the drain region of the NMOS to reduce the breakdown voltage of the PN junction in the drain region, thereby reducing the ESD trigger voltage and improving the ESD protection level of the NMOS. Furthermore, the invention is applicable to general integrated-circuit processes as well as various ESD protection devices.

公开(公告)号：US06573568B2

公开(公告)日：2003-06-03

申请号：US09871999

申请日：2001-06-01

申请人： Shi-Tron Lin ,  Wei-Fan Chen ,  Chenhsin Lien

发明人： Shi-Tron Lin ,  Wei-Fan Chen ,  Chenhsin Lien

IPC分类号： H01L2976

CPC分类号： H01L27/027 ,  H01L27/0203

摘要： ESD protection devices and methods to form them are provided in this invention. By employing the thin gate oxide fabricated by a dual gate oxide process, ESD protection devices with a lower trigger voltage are provided. The NMOS for ESD protection according to the present invention has islands with thin gate oxides and a control gate with a thick gate oxide. These islands overlap the drain region of the NMOS to reduce the breakdown voltage of the PN junction in the drain region, thereby reducing the ESD trigger voltage and improving the ESD protection level of the NMOS. Furthermore, the invention is applicable to general integrated-circuit processes as well as various ESD protection devices.