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1.
公开(公告)号:US20110143510A1
公开(公告)日:2011-06-16
申请号:US12638958
申请日:2009-12-15
申请人: Shun Wu LIN , Peng-Soon Lim , Matt Yeh , Ouyang Hui
发明人: Shun Wu LIN , Peng-Soon Lim , Matt Yeh , Ouyang Hui
IPC分类号: H01L21/336
CPC分类号: H01L29/66795 , H01L29/785
摘要: A method of forming a FinFET device is provided. In one embodiment, a fin is formed on a substrate. A gate structure is formed over the fin, the gate structure having a dielectric layer and a conformal first polysilicon layer formed above the dielectric layer. An etch stop layer is formed above the first polysilicon layer and thereafter a second polysilicon layer is formed above the etch stop layer. The second polysilicon layer and the etch stop layer are removed. A metal layer is formed above the first polysilicon layer. The first polysilicon layer is reacted with the metal layer to silicide the first polysilicon layer. Any un-reacted metal layer is thereafter removed and source and drain regions are formed on opposite sides of the fin.
摘要翻译: 提供了一种形成FinFET器件的方法。 在一个实施例中,在衬底上形成翅片。 栅极结构形成在鳍片上,栅极结构具有介电层和形成在电介质层上方的共形第一多晶硅层。 在第一多晶硅层上方形成蚀刻停止层,此后在蚀刻停止层上方形成第二多晶硅层。 去除第二多晶硅层和蚀刻停止层。 金属层形成在第一多晶硅层的上方。 第一多晶硅层与金属层反应以使第一多晶硅层硅化。 此后除去任何未反应的金属层,并且在鳍的相对侧上形成源区和漏区。
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2.
公开(公告)号:US08114721B2
公开(公告)日:2012-02-14
申请号:US12638958
申请日:2009-12-15
申请人: Shun Wu Lin , Peng-Soon Lim , Matt Yeh , Ouyang Hui
发明人: Shun Wu Lin , Peng-Soon Lim , Matt Yeh , Ouyang Hui
CPC分类号: H01L29/66795 , H01L29/785
摘要: A method of forming a FinFET device is provided. In one embodiment, a fin is formed on a substrate. A gate structure is formed over the fin, the gate structure having a dielectric layer and a conformal first polysilicon layer formed above the dielectric layer. An etch stop layer is formed above the first polysilicon layer and thereafter a second polysilicon layer is formed above the etch stop layer. The second polysilicon layer and the etch stop layer are removed. A metal layer is formed above the first polysilicon layer. The first polysilicon layer is reacted with the metal layer to silicide the first polysilicon layer. Any un-reacted metal layer is thereafter removed and source and drain regions are formed on opposite sides of the fin.
摘要翻译: 提供了一种形成FinFET器件的方法。 在一个实施例中,在衬底上形成翅片。 栅极结构形成在鳍片上,栅极结构具有介电层和形成在电介质层上方的共形第一多晶硅层。 在第一多晶硅层上方形成蚀刻停止层,此后在蚀刻停止层上方形成第二多晶硅层。 去除第二多晶硅层和蚀刻停止层。 金属层形成在第一多晶硅层的上方。 第一多晶硅层与金属层反应以使第一多晶硅层硅化。 此后除去任何未反应的金属层,并且在鳍的相对侧上形成源区和漏区。
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公开(公告)号:US08048733B2
公开(公告)日:2011-11-01
申请号:US12757295
申请日:2010-04-09
申请人: Matt Yeh , Yi-Chen Huang , Fan-Yi Hsu , Ouyang Hui
发明人: Matt Yeh , Yi-Chen Huang , Fan-Yi Hsu , Ouyang Hui
IPC分类号: H01L21/8238
CPC分类号: H01L29/66545 , H01L21/2822 , H01L29/51 , H01L29/6659 , H01L29/7833
摘要: An method of fabricating the gate structure comprises: sequentially depositing and patterning a dummy oxide layer and a dummy gate electrode layer on a substrate; surrounding the dummy oxide layer and the dummy gate electrode layer with a nitrogen-containing dielectric layer and an interlayer dielectric layer; removing the dummy gate electrode layer; removing the dummy oxide layer by exposing a surface of the dummy oxide layer to a vapor mixture comprising NH3 and a fluorine-containing compound at a first temperature; heating the substrate to a second temperature to form an opening in the nitrogen-containing dielectric layer; depositing a gate dielectric; and depositing a gate electrode.
摘要翻译: 制造栅极结构的方法包括:在衬底上依次沉积和图案化虚拟氧化物层和伪栅极电极层; 用含氮介电层和层间电介质层包围虚拟氧化物层和虚拟栅极电极层; 去除所述伪栅电极层; 通过在第一温度将所述虚拟氧化物层的表面暴露于包含NH 3和含氟化合物的蒸气混合物中来除去所述虚拟氧化物层; 将基板加热到第二温度以在含氮介电层中形成开口; 沉积栅极电介质; 并沉积栅电极。
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公开(公告)号:US08361855B2
公开(公告)日:2013-01-29
申请号:US13252642
申请日:2011-10-04
申请人: Matt Yeh , Yi-Chen Huang , Fan-Yi Hsu , Ouyang Hui
发明人: Matt Yeh , Yi-Chen Huang , Fan-Yi Hsu , Ouyang Hui
IPC分类号: H01L21/8238
CPC分类号: H01L29/66545 , H01L21/2822 , H01L29/51 , H01L29/6659 , H01L29/7833
摘要: An method of fabricating the gate structure comprises: sequentially depositing and patterning a dummy oxide layer and a dummy gate electrode layer on a substrate; surrounding the dummy oxide layer and the dummy gate electrode layer with a nitrogen-containing dielectric layer and an interlayer dielectric layer; removing the dummy gate electrode layer; removing the dummy oxide layer by exposing a surface of the dummy oxide layer to a vapor mixture comprising NH3 and a fluorine-containing compound at a first temperature; heating the substrate to a second temperature to form an opening in the nitrogen-containing dielectric layer; depositing a gate dielectric; and depositing a gate electrode.
摘要翻译: 制造栅极结构的方法包括:在衬底上依次沉积和图案化虚拟氧化物层和伪栅极电极层; 用含氮介电层和层间电介质层包围虚拟氧化物层和虚拟栅极电极层; 去除所述伪栅电极层; 通过在第一温度将所述虚拟氧化物层的表面暴露于包含NH 3和含氟化合物的蒸气混合物中来除去所述虚拟氧化物层; 将基板加热到第二温度以在含氮介电层中形成开口; 沉积栅极电介质; 并沉积栅电极。
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