Method of transforming serial scrambler to parallel scrambler, parallel scrambler and double-edge-triggered register with XOR operation
    1.
    发明授权
    Method of transforming serial scrambler to parallel scrambler, parallel scrambler and double-edge-triggered register with XOR operation 有权
    将串行扰码器转换为并行扰频器,并行加扰器和双边沿触发寄存器的异或运算方法

    公开(公告)号:US07639801B2

    公开(公告)日:2009-12-29

    申请号:US11096957

    申请日:2005-03-31

    IPC分类号: H04L9/00

    摘要: A method of transforming a serial scrambler to a parallel scrambler, a parallel scrambler and a double-edge-triggered register with XOR operation are provided. The method transforms a serial scrambler to a parallel scrambler according to a characteristic polynomial: P ⁡ ( x ) = ∑ q = 0 N ⁢ c q ⁢ x q ⁢ ⁢ or ⁢ ⁢ b ⁡ ( i ) = ∑ q = 1 N ⁢ c q ⁢ b ⁡ ( i - q ) . The method first determines a transformation formula: b ⁡ ( kN + i ) = ∑ q = 1 N ⁢ c q ⁢ b ⁡ ( ( k - R ) ⁢ N + i + R ⁡ ( N - q ) ) according to the parameters of the characteristic polynomial. The parallel bits Bj=[bMj, bMj+1, . . . , bMj+M−2, bMj+M−1] are arranged in order. The transformation number R=2t (the initial number of t is 0) is set. The parallel bits are replaced by the transformation formula. When (k−R)N+i+R(N−q) is larger than Mj−1 in the transformation formula, 1 is added to t in the transformation formula R=2t and the transformation formula is re-counted. Finally, the XOR gates are connected to the registers according to a computed result from the transformation formula.

    摘要翻译: 提供了一种将串行加扰器变换为并行扰频器,并行扰频器和具有异或运算的双边沿触发寄存器的方法。 该方法根据特征多项式将串扰扰码器转换为并行扰频器:P⁡(x)=Σq = 0 N cq xq ud或⁢b⁡(i)=Σq = 1 N cq b⁡(i-q)。 该方法首先根据下列参数确定变换公式:b⁡(kN + i)=Σq = 1 N cq b⁡((k-R)N + i + R⁡(N-q) 特征多项式。 并行位Bj = [bMj,bMj + 1,... 。 。 ,bMj + M-2,bMj + M-1]。 转换数R = 2t(t的初始数为0)被设置。 并行位由变换公式代替。 当变换式中(k-R)N + i + R(N-q)大于Mj-1时,在转化公式R = 2t中加入1,转化公式重新计算。 最后,XOR门根据转换公式的计算结果连接到寄存器。

    Method of transforming serial scrambler to parallel scrambler, parallel scrambler and double-edge-triggered register with XOR operation

    公开(公告)号:US20060029225A1

    公开(公告)日:2006-02-09

    申请号:US11096957

    申请日:2005-03-31

    IPC分类号: H04K1/06

    摘要: A method of transforming a serial scrambler to a parallel scrambler, a parallel scrambler and a double-edge-triggered register with XOR operation are provided. The method transforms a serial scrambler to a parallel scrambler according to a characteristic polynomial: P ⁡ ( x ) = ∑ q = 0 N ⁢ c q ⁢ x q ⁢   ⁢ or ⁢   ⁢ b ⁡ ( i ) = ∑ q = 1 N ⁢ c q ⁢ b ⁡ ( i - q ) . The method first determines a transformation formula: b ⁡ ( kN + i ) = ∑ q = 1 N ⁢ c q ⁢ b ⁡ ( ( k - R ) ⁢ N + i + R ⁡ ( N - q ) ) according to the parameters of the characteristic polynomial. The parallel bits Bj=[bMj, bMj+1, . . . , bMj+M−2, bMj+M−1] are arranged in order. The transformation number R=2t (the initial number of t is 0) is set. The parallel bits are replaced by the transformation formula. When (k−R)N+i+R(N−q) is larger than Mj−1 in the transformation formula, 1 is added to t in the transformation formula R=2t and the transformation formula is re-counted. Finally, the XOR gates are connected to the registers according to a computed result from the transformation formula.