公开(公告)号：US10310528B1

公开(公告)日：2019-06-04

申请号：US15833515

申请日：2017-12-06

Applicant: Silicon Laboratories Inc.

Inventor： Mohamed Elsayed ,  Scott D. Willingham

IPC: G05F1/565 ,  G05F1/46 ,  G05F1/575 ,  G05F3/22 ,  G05F3/24 ,  G05F3/30

Abstract: A band gap circuit with offset voltage error correction including a diode junction circuit, an error amplifier, a current device, a bias current generator, a calibration circuit, and a mode control circuit. During a normal mode of operation, the error amplifier monitors feedback nodes of the diode junction circuit and drives the current device to provide a control current to the diode junction circuit. During a calibration mode, the current device is decoupled from the diode junction circuit and the inputs of the error amplifier are shorted together, the bias generator circuit sinks a bias current from the current device and separately sources a bias current to the diode junction circuit such that the error amplifier operates as a comparator, and the calibration circuit monitors the output of the current device while adjusting a trim current of the error amplifier to minimize an offset voltage error of the error amplifier.