Context switching demodulator and symbol identifier

    公开(公告)号:US11777548B1

    公开(公告)日:2023-10-03

    申请号:US17743047

    申请日:2022-05-12

    CPC classification number: H04B1/16 H04L7/042

    Abstract: A receiver concurrently demodulates data transmitted with a plurality of protocols. The receiver utilizes multiple and simultaneous protocol detections at preamble and/or packet payload phases. To provide robust detection and achieve fewer false detections, the receiver extends the cross correlation length once a short cross-correlation is valid. The receiver includes a first demodulator path and a second demodulator path with different filter bandwidths. The second demodulator path includes a decimator that reduces data by two. A correlator bank is coupled to the first and second demodulator paths and concurrently detects preamble symbols associated with a plurality of protocols. A first noise detector is coupled to the first demodulator path and a second noise detector is coupled to the second demodulator path. A first symbol identifier circuit is coupled to the first demodulator path and a second symbol identifier circuit coupled to the second demodulator path to provide packet payload symbol detection.

    CONCURRENT LISTENING
    2.
    发明公开

    公开(公告)号:US20230371067A1

    公开(公告)日:2023-11-16

    申请号:US17743042

    申请日:2022-05-12

    CPC classification number: H04W74/0808 H04W74/04 H04L5/0053 H04W4/80 H04W4/23

    Abstract: A wireless communication device has a receiver to listen to a sequence of channels. A controller responds to a preamble being detected on a first channel while the receiver is tuned to the first channel by causing the receiver to stay on the first channel and decode packet(s) associated with the preamble. The controller responds to detection of a first symbol of a first transmission protocol and the preamble not being detected to cause the receiver to stay on the first channel for a predetermined time waiting for a retry. The controller responds to detection of a second symbol of a second transmission protocol and the preamble not being detected to cause the receiver to switch to an advertising channel of the second transmission protocol. If no preambles, noise, or symbols are detected, the receiver switches to listening to a next channel in the sequence after a fixed time.

    FAST FREQUENCY SYNTHESIZER SWITCHING
    3.
    发明公开

    公开(公告)号:US20230318609A1

    公开(公告)日:2023-10-05

    申请号:US17709642

    申请日:2022-03-31

    CPC classification number: H03L7/1075 H04B1/40 H03L7/099

    Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.

    Concurrent listening
    4.
    发明授权

    公开(公告)号:US12219599B2

    公开(公告)日:2025-02-04

    申请号:US17743042

    申请日:2022-05-12

    Abstract: A wireless communication device has a receiver to listen to a sequence of channels. A controller responds to a preamble being detected on a first channel while the receiver is tuned to the first channel by causing the receiver to stay on the first channel and decode packet(s) associated with the preamble. The controller responds to detection of a first symbol of a first transmission protocol and the preamble not being detected to cause the receiver to stay on the first channel for a predetermined time waiting for a retry. The controller responds to detection of a second symbol of a second transmission protocol and the preamble not being detected to cause the receiver to switch to an advertising channel of the second transmission protocol. If no preambles, noise, or symbols are detected, the receiver switches to listening to a next channel in the sequence after a fixed time.

    Fast frequency synthesizer switching

    公开(公告)号:US11973509B2

    公开(公告)日:2024-04-30

    申请号:US17709642

    申请日:2022-03-31

    CPC classification number: H03L7/1075 H03L7/099 H04B1/40

    Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.

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