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公开(公告)号:US10657047B2
公开(公告)日:2020-05-19
申请号:US16026917
申请日:2018-07-03
Applicant: Silicon Motion, Inc.
Inventor: Sheng-Hsun Lin
IPC: G06F12/02 , G06F12/1009
Abstract: A data storage device is provided. The data storage device includes: a flash memory and a microcontroller. The flash memory includes a plurality of physical blocks. The microcontroller selects one source block and one destination block from the plurality of physical blocks, and performs a garbage collection operation according to a check map corresponding to the selected source block to copy data stored in one or more valid physical addresses of the source block to the selected destination block.
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公开(公告)号:US11210226B2
公开(公告)日:2021-12-28
申请号:US16851572
申请日:2020-04-17
Applicant: Silicon Motion, Inc.
Inventor: Jui-Lin Yen , Sheng-Hsun Lin , Jian-Wei Sun
IPC: G06F12/0866
Abstract: A data storage device is provided. The data storage device includes a flash memory, a dynamic random access memory (DRAM), and a memory controller. The flash memory is configured to store a logical-to-physical mapping (L2P) table that is divided into a plurality of group-mapping (G2P) tables. The memory controller includes a first processing core and a second processing core. The first processing core receives a host access command from a host. When a specific G2P table corresponding to a specific logical address in the host access command is not stored in the DRAM, the first processing core determines whether the second processing core has loaded the specific G2P table from the flash memory to the DRAM according to the values in a first column in a first bit map and in a second column of a second bit map.
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公开(公告)号:US11657001B2
公开(公告)日:2023-05-23
申请号:US17584753
申请日:2022-01-26
Applicant: Silicon Motion, Inc.
Inventor: Sheng-Hsun Lin
IPC: G06F12/1009
CPC classification number: G06F12/1009 , G06F2212/651 , G06F2212/7201
Abstract: A management technology for mapping data of a non-volatile memory is shown. A controller establishes a first mapping table and a second mapping table. By looking up the first mapping table, the controller maps a first logical address issued by the host for data reading to a first block substitute. By looking up the second mapping table, the controller maps the first block substitute to a first physical block of the non-volatile memory. The first mapping table further records a first offset for the first logical address. According to the first offset recorded in the first mapping table, the first logical address is mapped to a first data management unit having the first offset in the first physical block represented by the first block substitute.
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公开(公告)号:US11086798B2
公开(公告)日:2021-08-10
申请号:US16728888
申请日:2019-12-27
Applicant: Silicon Motion, Inc.
Inventor: Kuan-Te Li , Sheng-Hsun Lin , Kuei-Sung Hsu , Jian-Wei Sun
Abstract: The invention introduces a method for controlling data access to a flash memory, performed by a processing unit, including steps of: obtaining a logical address associated with a data read operation; determining whether a group table corresponding to the logical address is queued in a locked queue, or a hot zone of a swap queue; and prohibiting content of the locked queue and the swap queue from being modified when the group table corresponding to the logical address is queued in the locked queue, or the hot zone of the swap queue.
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公开(公告)号:US20190220396A1
公开(公告)日:2019-07-18
申请号:US16026917
申请日:2018-07-03
Applicant: Silicon Motion, Inc.
Inventor: Sheng-Hsun Lin
IPC: G06F12/02 , G06F12/1009
CPC classification number: G06F12/0253 , G06F12/0246 , G06F12/1009 , G06F2212/1044 , G06F2212/152 , G06F2212/2022 , G06F2212/657
Abstract: A data storage device is provided. The data storage device includes: a flash memory and a microcontroller. The flash memory includes a plurality of physical blocks. The microcontroller selects one source block and one destination block from the plurality of physical blocks, and performs a garbage collection operation according to a check map corresponding to the selected source block to copy data stored in one or more valid physical addresses of the source block to the selected destination block.
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