公开(公告)号：US20040152397A1

公开(公告)日：2004-08-05

申请号：US10762807

申请日：2004-01-21

Applicant: Silicon Storage Technology, Inc.

Inventor： Amitay Levi ,  Gian Sharma

IPC: B24B001/00

CPC classification number: H01L21/31055 ,  H01L21/31053

Abstract: A method of CMP planarizing a silicon dioxide layer on a silicon nitride in the semiconductor die is disclosed. A wafer has a plurality substantially identical semiconductor dies defined on the wafer. Each of the dies is separated from one another by a scribe line. A layer of silicon nitride is formed on the planar surface of the wafer where the silicon nitride has a top surface which is substantially parallel to the planar surface. A layer of silicon dioxide is deposited on the top surface with the silicon dioxide varying in height above the top surface. A mask is formed across the wafer, including on the scribe line, where the mask has a plurality of locations with each location having a differing density of gap-to-pillar ratio, which is proportional to the height of the silicon dioxide above the top surface. The silicon dioxide is anisotropically etched through each gap of the mask across the entire wafer where each gap is etched by the same amount in the height direction. CMP is then used to planarize the silicon dioxide to the top surface of the silicon nitride across the entire wafer.

Abstract translation: 公开了一种在半导体管芯中的氮化硅上平坦化二氧化硅层的CMP方法。 晶片具有限定在晶片上的多个基本上相同的半导体管芯。 每个模具通过划线彼此分开。 在晶片的平坦表面上形成氮化硅层，其中氮化硅具有基本平行于平面的顶表面。 一层二氧化硅沉积在顶表面上，二氧化硅的高度高于顶表面。 在晶片上形成掩模，包括在划线上，其中掩模具有多个位置，每个位置具有不同的间隙与柱之比的密度，其与顶部上方的二氧化硅的高度成比例 表面。 通过掩模的每个间隙在整个晶片上各向异性蚀刻二氧化硅，其中每个间隙在高度方向上被蚀刻相同的量。 然后使用CMP将二氧化硅平坦化到跨越整个晶片的氮化硅的顶表面。