公开(公告)号：US11563985B2

公开(公告)日：2023-01-24

申请号：US16257317

申请日：2019-01-25

Applicant: Socionext Inc.

Inventor： Tomonori Kataoka ,  Hideshi Nishida ,  Kouzou Kimura ,  Nobuo Higaki ,  Tokuzo Kiyohara

IPC: G06F9/38 ,  H04N19/86 ,  H04N19/61 ,  H04N19/44 ,  H04N19/42 ,  H04N19/436 ,  H04N19/523

Abstract: A signal-processing apparatus includes an instruction-parallel processor, a first data-parallel processor, a second data-parallel processor, and a motion detection unit, a de-blocking filtering unit and a variable-length coding/decoding unit which are dedicated hardware. With this structure, during signal processing of an image compression and decompression algorithm needing a large amount of processing, the load is distributed between software and hardware, so that the signal-processing apparatus can realize high processing capability and flexibility.