公开(公告)号：US20240290715A1

公开(公告)日：2024-08-29

申请号：US18399335

申请日：2023-12-28

Applicant: Socionext Inc.

Inventor： Yasuhiko MAKI

IPC: H01L23/528 ,  H01L23/522 ,  H01L25/065

CPC classification number: H01L23/5283 ,  H01L23/5226 ,  H01L25/0657 ,  H01L2225/06541

Abstract: In a semiconductor integrated circuit device, a first semiconductor chip includes: a buried power rail that supplies first power; and a power line that is provided in a layer above the buried power rail and supplies second power. The buried power rail receives supply of the first power from the back face of the first semiconductor chip via a first through electrode, and the power line receives supply of the second power from the back face of the first semiconductor chip via a second through electrode. The cross-sectional area of the second through electrode is greater than the cross-sectional area of the first through electrode.