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公开(公告)号：US11190140B2
公开(公告)日：2021-11-30
申请号：US16967745
申请日：2020-04-30
Applicant: SOUTHEAST UNIVERSITY
Inventor： Chao Chen , Jun Yang , Xinning Liu
Abstract: A wide voltage trans-impedance amplifier includes a first P-channel metal oxide semiconductor (PMOS) transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a first bias voltage VB1, a second bias voltage VB2, a third bias voltage VB3, a first N-channel metal oxide semiconductor (NMOS) transistor NM1, and a second NMOS transistor NM2. A common-gate amplifier detects a change of an input voltage, and a negative feedback is constructed by injecting a current into a current mirror to achieve a low input impedance. The trans-impedance amplifier uses a common-gate amplifier to monitor an input voltage and uses a current mirror to perform the transconductance enhancement on an input transistor, while ensuring a relatively high loop gain.
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Patent Agency Ranking
公开(公告)号：US11290009B2
公开(公告)日：2022-03-29
申请号：US16966474
申请日：2020-04-30
Applicant: SOUTHEAST UNIVERSITY
Inventor： Chao Chen , Jun Yang , Xinning Liu
Abstract: A high energy efficiency switched-capacitor power converter includes the transmission gates T1-T7, the capacitors C1-C4, the load capacitor CL, and resistors, PMOS tubes and NMOS tubes. The power converter converts a stable input voltage of 3V into an output voltage of 1V by means of charge transfer. In the state of timing sequence 1, the on-chip capacitor C1, the capacitor C2 and the load capacitor CL are charged in series. In the state of timing sequence 2, the capacitor C1 and the capacitor C2 are connected in parallel to the capacitor CL to supplement the charge loss due to load for the capacitor CL. When the establishment is completed, the voltages across the capacitor C1, the capacitor C2, and the capacitor CL are basically the same. At this time, the voltage drop across the switch tube approximates 0 V during the charge transfer process.
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公开(公告)号：US10199987B2
公开(公告)日：2019-02-05
申请号：US15776780
申请日：2016-01-29
Applicant: SOUTHEAST UNIVERSITY
Inventor： Chao Chen , Jianhui Wu , Hong Li , Cheng Huang , Meng Zhang
Abstract: A self-reconfigurable returnable mixer includes a self-reconfigurable transconductance stage. The input RF voltage signal is converted into RF current through the self-reconfigurable transconductance stage. The RF current is converted into an IF signal through down-conversion and low-pass filtering. The IF signal is fed back to the reconfigurable transconductance stage; the self-reconfigurable transconductance stage presents an open-loop structure to the input RF voltage signal, and the self-reconfigurable transconductance stage presents the topology structure of the negative feedback amplifier to the fed-back IF signal. The self-reconfigurable transconductance stage circuit achieves a high-linearity IF gain while providing a high bandwidth for the RF signal, effectively alleviating the contradiction between the conversion gain and the IF linearity in the conventional returnable structure.
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公开(公告)号：US10097223B2
公开(公告)日：2018-10-09
申请号：US15509202
申请日：2016-01-29
Applicant: Southeast University
Inventor： Chao Chen , Jianhui Wu , Hong Li
Abstract: The present invention discloses a low power supply voltage double-conversion radio frequency receiving front end, which can work at a lower power supply voltage in a passive frequency conversion mode; a first frequency conversion unit and a second frequency conversion unit of the front end are directly cascaded, and a second orthogonal passive frequency conversion shifts a low input impedance of a transimpedance amplifier to an intermediate frequency, so as to construct a band-pass filtering function for radio frequency current; and the radio frequency current which has undergone two frequency conversions is converted into an output intermediate frequency voltage via the transimpedance amplifier. Compared with the traditional active+active or active+passive double conversion mode, the present invention omits intermediate-stage active circuits and filtering circuits, thereby saving power consumption and layout area, and realizing sufficient rejection on an image signal while ensuring a high conversion gain.
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公开(公告)号：US11196335B2
公开(公告)日：2021-12-07
申请号：US16968594
申请日：2020-04-30
Applicant: SOUTHEAST UNIVERSITY
Inventor： Chao Chen , Jun Yang , Xinning Liu
Abstract: An ultra-low-power mode control circuit for a power converter includes four modules: a level shift circuit, a start circuit, a static clamp circuit, and a control circuit. When a chip is powered on and a core voltage has not been established, the control circuit firstly starts a power source built-in clock to support operation of the power converter. When the core voltage is established, the control circuit determines whether to switch to an external clock according to a level of a mode selection signal. After the core voltage is powered down, the control circuit automatically wakes up the built-in clock to work.
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公开(公告)号：US11175686B2
公开(公告)日：2021-11-16
申请号：US16966476
申请日：2020-04-30
Applicant: SOUTHEAST UNIVERSITY
Inventor： Chao Chen , Jun Yang , Xinning Liu
Abstract: A low-temperature drift ultra-low-power linear regulator includes eight PMOS transistors, two resistors, two capacitors and three NMOS transistors. The eight PMOS transistors include PMOS transistor PM1 to PMOS transistor PM8. The two resistors include resistor R1 and resistor R2. The two capacitors include capacitor C1 and capacitor C2. The three NMOS transistors include NMOS transistor NM1, NMOS transistor NM2 and NMOS transistor NM3. From right to left, the linear regulator includes a PTAT voltage core starting circuit, a PTAT voltage core circuit, a negative temperature characteristic generating circuit and a driver stage closed-loop control circuit. PM5-PM8 form a feedback circuit. The feedback circuit clamps the current flowing through PM6 to be proportional to PM2 to obtain a temperature-stable output voltage, and can dynamically adjust the gate voltage of PM5 according to the change of load current to output different currents according to the load demand.
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