Abstract:
An arrangement of data storage cells are accessed in parallel for correlating a transport address pair with a respective local association. In one embodiment, each cell may contain a transport address pair and a local association ID. In another embodiment, multiple stages of partitioned content addressable arrays may be employed, with at least a portion of the transport address pair used to access the first stage and at least a portion of an output from a preceding stage used to select a corresponding array in a succeeding stage.
Abstract:
A method for selecting a plan for a query is disclosed. The steps of the method include using a current plan when a query is invoked, where the current plan has a corresponding current profile. Determining when the current profile is changed into a new profile. When the current profile has changed, comparing the new profile to a set of stored profiles. When the new profile matches one of a set of stored profiles, then set the new profile as the current profile. And set one of a set of stored plans that corresponds to the first stored profile, as the current plan. When the new profile does not match one of the set of stored profiles, then invoke an optimizer to determine a new plan for the new profile. Set the new profile as the current profile, set the new plan as the current plan, save the new plan into the set of stored plans, and save the new profile into the set of stored profiles.
Abstract:
An arrangement of data storage cells are accessed in parallel for correlating a transport address pair with a respective local association. In one embodiment, each cell may contain a transport address pair and a local association ID. In another embodiment, multiple stages of partitioned content addressable arrays may be employed, with at least a portion of the transport address pair used to access the first stage and at least a portion of an output from a preceding stage used to select a corresponding array in a succeeding stage.
Abstract:
During the last 75 years Analog to Digital converters revolutionized the signal processing industry. As transistor sizes reduced, higher resolution of bits is achieved. But FLASH and other full blown faster ADC implementations always consumed relatively higher power. As the analog signal comes into ADC frontend, conversion is initiated from the beginning. ADC conversion process is a highly mathematical number system problem, especially FLASH ADCs are. With faster, low power, and partitioned ADCS, better solutions can be built in so many vast expanding signal processing fields. It is time to come up with logical ADCS instead of brute force, start from the beginning conversion for every sample of analog signal. When the signal does not change abruptly, there is room for applying CACHE principles as it is done in this invention! The approach is to use a smaller ADC for full blown start from the beginning conversions and store it in upfront signal path as CACHED value. Then start using that Cached value set. There must be a balance between number of Cache entries, consumed power, and backend full blown ADC. It is obvious, backend ADC is rarely engaged in conversion when there are too many cache hits, which is desirable.
Abstract:
Greater throughput for a particular communication layer protocol is achieved in a multiprocessor host by having different instances of the same process running in parallel as separate modules associated with different processor, including at least one instance with functionality for Control messages and other instances with functionality for Data messages. The Control message functionality may be included in a Master module and the Data message functionality may be included in Slave modules; alternatively both functionalities may be included in the same modules arranged in a Distributed Peer configuration.
Abstract:
A received datagram is associated with the connection endpoint using a transport address index and an endpoint association array which includes a list of active transport addresses for each active endpoint association. At least some of the active endpoint lists include more than one transport address and each entry in the transport address index includes (or is linked to) one or more pointers to the specific transport addresses in the endpoint association array lists that are associated with that entry.