-
公开(公告)号：US06525520B2
公开(公告)日：2003-02-25
申请号：US09840176
申请日：2001-04-24
IPC分类号： G01R2500
CPC分类号： H03K5/135 , H04J3/0688
摘要： A pulse detector detects if a clock pulse signal is in phase with a reference clock pulse signal in an efficient manner with very high accuracy. The pulse detector includes a first delay unit adapted to receive an input clock pulse signal and to delay the input clock pulse signal by a first pre-specified delay for output as output clock pulse signal, and a second delay unit adapted to delay the output clock pulse signal by a second pre-specified delay. A sampling unit is adapted to sample the input clock pulse signal and the output of the second delay unit at a sampling time defined by a reference clock pulse signal and to output the samples for phase delay indication.
摘要翻译： 脉冲检测器以非常高的精度检测时钟脉冲信号是否与参考时钟脉冲信号以有效的方式同相。 脉冲检测器包括：第一延迟单元，适于接收输入时钟脉冲信号，并将输入时钟脉冲信号延迟第一预先指定的延迟以输出作为输出时钟脉冲信号;以及第二延迟单元，适于延迟输出时钟 脉冲信号由第二预先指定的延迟。 采样单元适于在由参考时钟脉冲信号限定的采样时间采样输入时钟脉冲信号和第二延迟单元的输出，并输出采样以进行相位延迟指示。
-
2.发明授权Hardware design for majority voting, and testing and maintenance of majority voting 失效多数投票的硬件设计，多数投票的测试和维护公开(公告)号：US06247160B1
公开(公告)日：2001-06-12
申请号：US09090411
申请日：1998-06-04
IPC分类号： G06F1108
CPC分类号： G06F11/187 , G06F11/1604
摘要： The invention relates to majority voting. A number of input signals are monitored individually by separate monitors, one monitor for each signal. Each monitor generates a control signal representing the status of the monitored signal. The generated control signals are sent to a level control unit. The level control unit control the input levels to a majority voter according to the control signals. Instead of signals that are faulty, the level control unit selects signals of specific logical levels to be forwarded to the majority logic. The logical levels of these so called replacement signals are selected such that the replacement signals do not interfere with the remaining correct signals. Furthermore, the majority voted output signal is monitored so as to selectively generate an alarm. The voting functionality is tested by stopping input signals according to a first procedure, thus generating an alarm. By stopping input signals according to a second procedure, an alarm is avoided.
摘要翻译： 本发明涉及多数投票。 多个输入信号由单独的监视器单独监视，每个信号一个监视器。 每个监视器产生表示所监视信号状态的控制信号。 所生成的控制信号被发送到电平控制单元。 电平控制单元根据控制信号将输入电平控制为多数选民。 代替有故障的信号，电平控制单元选择要转发到多数逻辑的特定逻辑电平的信号。 选择这些所谓的替换信号的逻辑电平，使得替换信号不会干扰剩余的正确信号。 此外，监视多数投票输出信号，以选择性地产生报警。 通过根据第一过程停止输入信号来测试投票功能，从而产生报警。 通过根据第二过程停止输入信号，避免了报警。
-
3.发明授权Hardware design for majority voting, and testing and maintenance of majority voting 有权多数投票的硬件设计，多数投票的测试和维护公开(公告)号：US06253348B1
公开(公告)日：2001-06-26
申请号：US09545863
申请日：2000-04-07
IPC分类号： G06F1108
CPC分类号： G06F11/187 , G06F11/1604
摘要： The invention relates to majority voting testing. A number of input signals are monitored individually by separate monitors, one monitor for each signal. Each monitor generates a control signal representing the status of the monitored signal. The generated control signals are sent to a level control unit. The level control unit controls the input levels to a majority voter according to the control signals. Instead of signals that are faulty, the level control unit selects signals of specific logical levels to be forwarded to the majority logic. The logical levels of these so called replacement signals are selected such that the replacement signals do not interfere with the remaining correct signals. Furthermore, the majority voted output signal is monitored so as to selectively generate an alarm. The voting functionality is tested by stopping input signals according to a first procedure, thus generating an alarm. By stopping input signals according to a second procedure, an alarm is avoided.
摘要翻译： 本发明涉及多数投票测试。 多个输入信号由单独的监视器单独监视，每个信号一个监视器。 每个监视器产生表示所监视信号状态的控制信号。 所生成的控制信号被发送到电平控制单元。 电平控制单元根据控制信号控制多数选民的输入电平。 代替有故障的信号，电平控制单元选择要转发到多数逻辑的特定逻辑电平的信号。 选择这些所谓的替换信号的逻辑电平，使得替换信号不会干扰剩余的正确信号。 此外，监视多数投票输出信号，以选择性地产生报警。 通过根据第一过程停止输入信号来测试投票功能，从而产生报警。 通过根据第二过程停止输入信号，避免了报警。
-
-
搜索结果
3 条记录 (耗时 0.017 秒)
