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公开(公告)号：US09008188B2
公开(公告)日：2015-04-14
申请号：US12934406
申请日：2009-03-27
CPC分类号： H03M13/1171 , H03M13/258 , H03M13/3944 , H03M13/395
摘要： New capabilities will allow conventional broadcast transmission to be available to mobile devices. A method of decoding a bitstream is described including receiving a demodulated bitstream, the demodulated bitstream encoded using a byte-code encoding process, arranging a portion of the demodulated bitstream into a subset of bits, reordering the subset of bits, and decoding the subset of bits based on a property of the subset of bits and the encoding process. An apparatus includes means for decoding a bitstream based on a property of the subset of bits and the encoding process.
摘要翻译： 新功能将允许传统的广播传输可用于移动设备。 描述了对比特流进行解码的方法，包括接收解调的比特流，使用字节码编码处理编码的解调比特流，将解调的比特流的一部分排列成比特的子集，重新排序比特的子集， 基于位的子集的属性和编码过程的位。 一种装置包括用于基于比特的子集和编码过程的属性来解码比特流的装置。
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公开(公告)号：US20110026601A1
公开(公告)日：2011-02-03
申请号：US12934406
申请日：2009-03-27
IPC分类号： H04N7/12
CPC分类号： H03M13/1171 , H03M13/258 , H03M13/3944 , H03M13/395
摘要： New capabilities will allow conventional broadcast transmission to be available to mobile devices. A method of decoding a bitstream is described including receiving a demodulated bitstream, the demodulated bitstream encoded using a byte-code encoding process, arranging a portion of the demodulated bitstream into a subset of bits, reordering the subset of bits, and decoding the subset of bits based on a property of the subset of bits and the encoding process. An apparatus includes means for decoding a bitstream based on a property of the subset of bits and the encoding process.
摘要翻译： 新功能将允许传统的广播传输可用于移动设备。 描述了对比特流进行解码的方法，包括接收解调的比特流，使用字节码编码处理编码的解调比特流，将解调的比特流的一部分排列成比特的子集，重新排序比特的子集， 基于位的子集的属性和编码过程的位。 一种装置包括用于基于比特的子集和编码过程的属性来解码比特流的装置。
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公开(公告)号：US09397772B2
公开(公告)日：2016-07-19
申请号：US13511692
申请日：2009-12-03
CPC分类号： H04H60/11 , H04H40/18 , H04L1/0057
摘要： A digital data stream comprises alternating groups of information blocks and groups of parity blocks, each group of information blocks includes multiple information blocks and each group of parity blocks includes multiple parity blocks. An apparatus for receiving a digital data stream comprises a demodulator that receives and demodulates a digital data stream. An equalizer compensates for distortions in the digital data stream. A delay buffer generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing a delayed version of the compensated digital data stream. A forward error correction block receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data. A transport block receives and processes the error corrected stream from the forward error correction block for display.
摘要翻译： 数字数据流包括交替的信息块组和奇偶校验块组，每组信息块包括多个信息块，并且每组奇偶校验块包括多个奇偶校验块。 一种用于接收数字数据流的装置，包括接收和解调数字数据流的解调器。 均衡器补偿数字数据流中的失真。 延迟缓冲器产生表示补偿的数字数据流的第一数字数据流和表示经补偿的数字数据流的延迟版本的第二数字数据流。 前向纠错块从延迟缓冲器接收并处理第一和第二数字数据流，并输出纠错的数字数据流。 传输块从前向纠错块接收并处理纠错流，以进行显示。
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公开(公告)号：US20120269277A1
公开(公告)日：2012-10-25
申请号：US13511692
申请日：2009-12-03
IPC分类号： H04N7/64
CPC分类号： H04H60/11 , H04H40/18 , H04L1/0057
摘要： A digital data stream comprises alternating groups of information blocks and groups of parity blocks, each group of information blocks includes multiple information blocks and each group of parity blocks includes multiple parity blocks. An apparatus for receiving a digital data stream comprises a demodulator that receives and demodulates a digital data stream. An equalizer compensates for distortions in the digital data stream. A delay buffer generates a first stream of digital data representing the compensated digital data stream and a second stream of digital data representing a delayed version of the compensated digital data stream. A forward error correction block receives and processes the first and second streams of digital data from the delay buffer, and outputs an error corrected stream of digital data. A transport block receives and processes the error corrected stream from the forward error correction block for display
摘要翻译： 数字数据流包括交替的信息块组和奇偶校验块组，每组信息块包括多个信息块，并且每组奇偶校验块包括多个奇偶校验块。 一种用于接收数字数据流的装置，包括接收和解调数字数据流的解调器。 均衡器补偿数字数据流中的失真。 延迟缓冲器产生表示补偿的数字数据流的第一数字数据流和表示经补偿的数字数据流的延迟版本的第二数字数据流。 前向纠错块从延迟缓冲器接收并处理第一和第二数字数据流，并输出纠错的数字数据流。 传输块从前向纠错块接收并处理纠错流，以进行显示
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