METHOD AND SYSTEM FOR IMPROVING DATA COHERENCY IN A PARALLEL RENDERING SYSTEM
    1.
    发明申请
    METHOD AND SYSTEM FOR IMPROVING DATA COHERENCY IN A PARALLEL RENDERING SYSTEM 有权
    用于提高并行渲染系统中的数据相关性的方法和系统

    公开(公告)号:US20120147027A1

    公开(公告)日:2012-06-14

    申请号:US13399458

    申请日:2012-02-17

    IPC分类号: G09G5/00

    摘要: A method and system for improving data coherency in a parallel rendering system is disclosed. Specifically, one embodiment of the present invention sets forth a method for managing a plurality of independently processed texture streams in a parallel rendering system that includes the steps of maintaining a time stamp for a group of tiles of work that are associated with each of the plurality of the texture streams and are associated with a specified area in screen space, and utilizing the time stamps to counter divergences in the independent processing of the plurality of texture streams.

    摘要翻译: 公开了一种用于提高并行渲染系统中数据一致性的方法和系统。 具体地,本发明的一个实施例阐述了一种用于在并行渲染系统中管理多个独立处理的纹理流的方法,该方法包括以下步骤:维护与多个相关联的工作的一组瓦片的时间戳 的纹理流并且与屏幕空间中的指定区域相关联,并且利用时间戳来反复在多个纹理流的独立处理中的分歧。

    EFFICIENT LINE AND PAGE ORGANIZATION FOR COMPRESSION STATUS BIT CACHING
    2.
    发明申请
    EFFICIENT LINE AND PAGE ORGANIZATION FOR COMPRESSION STATUS BIT CACHING 有权
    用于压缩状态位高速缓存的有效线和组合

    公开(公告)号:US20110087840A1

    公开(公告)日:2011-04-14

    申请号:US12901452

    申请日:2010-10-08

    IPC分类号: G06F12/00

    摘要: One embodiment of the present invention sets forth a technique for performing a memory access request to compressed data within a virtually mapped memory system comprising an arbitrary number of partitions. A virtual address is mapped to a linear physical address, specified by a page table entry (PTE). The PTE is configured to store compression attributes, which are used to locate compression status for a corresponding physical memory page within a compression status bit cache. The compression status bit cache operates in conjunction with a compression status bit backing store. If compression status is available from the compression status bit cache, then the memory access request proceeds using the compression status. If the compression status bit cache misses, then the miss triggers a fill operation from the backing store. After the fill completes, memory access proceeds using the newly filled compression status information.

    摘要翻译: 本发明的一个实施例提出了一种对包括任意数量的分区的虚拟映射的存储器系统中的压缩数据执行存储器访问请求的技术。 虚拟地址被映射到由页表项(PTE)指定的线性物理地址。 PTE被配置为存储压缩属性,其被用于定位压缩状态位缓存内的相应物理存储器页的压缩状态。 压缩状态位缓存与压缩状态位后备存储一起操作。 如果从压缩状态位缓存获得压缩状态,则存储器访问请求使用压缩状态进行。 如果压缩状态位缓存未命中,则错误触发后备存储器的填充操作。 填充完成后,使用新填充的压缩状态信息进行内存访问。

    ALPHA-TO-COVERAGE USING VIRTUAL SAMPLES
    3.
    发明申请
    ALPHA-TO-COVERAGE USING VIRTUAL SAMPLES 有权
    使用虚拟样品的ALPHA-TO-COVERAGE

    公开(公告)号:US20110090250A1

    公开(公告)日:2011-04-21

    申请号:US12904927

    申请日:2010-10-14

    IPC分类号: G09G5/00

    摘要: One embodiment of the present invention sets forth a technique for converting alpha values into pixel coverage masks. Geometric coverage is sampled at a number of “real” sample positions within each pixel. Color and depth values are computed for each of these real samples. Fragment alpha values are used to determine an alpha coverage mask for the real samples and additional “virtual” samples, in which the number of bits set in the mask bits is proportional to the alpha value. An alpha-to-coverage mode uses the virtual samples to increase the number of transparency levels for each pixel compared with using only real samples. The alpha-to-coverage mode may be used in conjunction with virtual coverage anti-aliasing to provide higher-quality transparency for rendering anti-aliased images.

    摘要翻译: 本发明的一个实施例提出了一种将α值转换为像素覆盖掩码的技术。 在每个像素内的多个“实”样本位置采样几何覆盖。 为这些实际样本中的每一个计算颜色和深度值。 片段α值用于确定实际样本和附加“虚拟”样本的alpha覆盖掩码,其中掩码位中设置的位数与alpha值成比例。 与仅使用真实样本相比,alpha到覆盖模式使用虚拟样本来增加每个像素的透明度级别数。 alpha到覆盖模式可以与虚拟覆盖抗锯齿一起使用,以提供用于渲染抗锯齿图像的更高质量的透明度。