公开(公告)号：US20070222430A1

公开(公告)日：2007-09-27

申请号：US11388925

申请日：2006-03-24

申请人： Steven Sullivan ,  Kristie Veith ,  Terrance Beale

发明人： Steven Sullivan ,  Kristie Veith ,  Terrance Beale

IPC分类号： G01R13/14 ,  G01R13/34

CPC分类号： G01R13/0254

摘要： An improved digital trigger circuit has a plurality of data samples extracted from an input electrical signal for each sample clock cycle. The plurality of data samples are compared in parallel with a high threshold level and a low threshold level which provides hysteresis for noise rejection. Also the plurality of data samples are used to determine sub-sample trigger positioning. The comparison outputs are input to a digital trigger logic circuit for identifying a selected trigger event and generating a trigger for the acquisition of data from the input electrical signal for analysis and display. The digital trigger logic provides edge event triggering, pulse width triggering and transition time triggering, among others.

摘要翻译： 改进的数字触发电路具有从每个采样时钟周期的输入电信号提取的多个数据样本。 将多个数据样本并行地与高阈值电平和低阈值电平进行比较，其提供用于噪声抑制的滞后。 此外，多个数据样本用于确定子采样触发定位。 比较输出被输入到数字触发逻辑电路，用于识别所选择的触发事件并产生用于从输入电信号中采集数据的触发用于分析和显示。 数字触发逻辑提供边缘事件触发，脉冲宽度触发和转换时间触发等。

公开(公告)号：US20070222429A1

公开(公告)日：2007-09-27

申请号：US11388428

申请日：2006-03-24

申请人： Steven Sullivan ,  Terrance Beale ,  Kristie Veith

发明人： Steven Sullivan ,  Terrance Beale ,  Kristie Veith

IPC分类号： G01R13/14

CPC分类号： G01R13/0254

摘要： A “no dead time” data acquisition system for a measurement instrument receives a digitized signal representing an electrical signal being monitored and generates from the digitized signal a trigger signal using a fast digital trigger circuit, the trigger signal including all trigger events within the digitized signal. The digitized signal is compressed as desired and delayed by a first-in, first-out (FIFO) buffer for a period of time to assure a predetermined amount of data prior to a first trigger event in the trigger signal. The delayed digitized signal is delivered to a fast rasterizer or drawing engine upon the occurrence of the first trigger event to generate a waveform image. The waveform image is then provided to a display buffer for combination with prior waveforms and/or other graphic inputs from other drawing engines. The contents of the display buffer are provided to a display at a display update rate to show a composite of all waveform images representing the electrical signal.

摘要翻译： 用于测量仪器的“无死区时间”数据采集系统接收表示正在监视的电信号的数字化信号，并且使用快速数字触发电路从数字化信号产生触发信号，触发信号包括数字化信号内的所有触发事件 。 数字化信号根据需要被压缩并且由先入先出（FIFO）缓冲器延迟一段时间，以确保在触发信号中的第一触发事件之前的预定量的数据。 延迟数字化信号在发生第一触发事件时被传送到快速光栅化器或绘图引擎以产生波形图像。 然后将波形图像提供给显示缓冲器，以与来自其它绘图引擎的先前波形和/或其他图形输入组合。 以显示更新率将显示缓冲器的内容提供给显示器，以显示表示电信号的所有波形图像的合成。

公开(公告)号：US20070236480A1

公开(公告)日：2007-10-11

申请号：US11393129

申请日：2006-03-29

申请人： Steven Sullivan ,  Terrance Beale

发明人： Steven Sullivan ,  Terrance Beale

IPC分类号： G09G5/00

CPC分类号： G09G5/39 ,  G01R13/02 ,  G09G2360/126

摘要： A fast rasterizer uses a fast memory that has a bit-set port for receiving data and a totally independent readout and clear port for outputting a waveform image. The fast memory is organized into rows and columns corresponding to the rows and columns of a raster display device, with each memory location or cell holding a single bit. The fast memory is divided into parallel sections so that one column of each section may be written into each clock cycle, resulting in the possibility of writing a plurality of columns into the fast memory each clock cycle. Each memory cell is set when a row and column write signal for the cell are asserted, and is read out and cleared when a row and column read signal for the cell are asserted. Row logic using thermometer codes is used to set the row lines for the selected column in each section.

摘要翻译： 快速光栅化器使用具有用于接收数据的位设置端口和用于输出波形图像的完全独立读出和清除端口的快速存储器。 快速存储器被组织成与光栅显示设备的行和列相对应的行和列，每个存储器位置或单元保持单个位。 快速存储器被分为并行部分，使得每个部分的一列可以写入每个时钟周期，导致在每个时钟周期将多个列写入快速存储器的可能性。 当单元的行和列写入信号被断言时，每个存储单元被置位，并且当单元的行和列读取信号被断言时被读出和清除。 使用温度计代码的行逻辑用于设置每个部分中所选列的行行。

公开(公告)号：US20070226406A1

公开(公告)日：2007-09-27

申请号：US11388926

申请日：2006-03-24

申请人： Terrance Beale ,  Steven Sullivan ,  Kristie L.Veith

发明人： Terrance Beale ,  Steven Sullivan ,  Kristie L.Veith

IPC分类号： G06F12/00 ,  G06F13/00

CPC分类号： G06F5/14 ,  G01R13/029

摘要： A data management method for a long record length memory that is used for data acquisition writes data samples into an initial circular buffer within the memory having a size equal to a pre-trigger time. When a first trigger event occurs, the data samples are then written into a linear region after the circular buffer within the memory. The data sample acquisition in the linear region continues until a post-trigger and new pre-trigger time have elapsed after a last trigger event, at which point the acquisition terminates and the new pre-trigger time becomes a new circular buffer for a next trigger event. In this way all trigger events are captured with associated pre-trigger and post-trigger data.

摘要翻译： 用于数据采集的长记录长度存储器的数据管理方法将数据样本写入具有等于预触发时间的大小的存储器内的初始循环缓冲器。 当发生第一触发事件时，数据样本然后被写入存储器中的循环缓冲器之后的线性区域。 线性区域中的数据样本采集继续，直到最后一次触发事件发生后触发和新的预触发时间，此时采集终止，新的预触发时间成为新的循环缓冲区，用于下一个触发 事件。 以这种方式，所有触发事件都将被捕获与相关的预触发和后触发数据。