公开(公告)号：US08208482B2

公开(公告)日：2012-06-26

申请号：US10778363

申请日：2004-02-17

申请人： Su-Hyun Kim ,  Jong-Sang Oh ,  Byung-Gu Choe

发明人： Su-Hyun Kim ,  Jong-Sang Oh ,  Byung-Gu Choe

IPC分类号： H04L12/54

CPC分类号： H04L49/9063 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9031

摘要： An apparatus adapted to transmit and receive a packet between a network processor and a packet controller includes: the packet controller receiving an input packet from an input interface; a packet buffer storing and delivering the input packet the received input packet in response to a request from the network processor; a packet queue delivering information for the stored input packet from the packet controller to the network processor; and the network processor receiving a packet from the packet buffer and delivering the packet to an output interface using information for the input packet from the packet queue.

摘要翻译： 适于在网络处理器和分组控制器之间发送和接收分组的装置包括：分组控制器从输入接口接收输入分组; 分组缓冲器，响应于来自网络处理器的请求，存储并传送所接收的输入分组的输入分组; 分组队列，用于将所存储的输入分组的信息从分组控制器传送到网络处理器; 并且网络处理器从分组缓冲器接收分组，并且使用来自分组队列的输入分组的信息将分组传送到输出接口。

公开(公告)号：US07321595B2

公开(公告)日：2008-01-22

申请号：US10436104

申请日：2003-05-13

申请人： Su-Hyun Kim ,  Young-Seok Kim ,  Young-Il Kim ,  Jong-Sang Oh

发明人： Su-Hyun Kim ,  Young-Seok Kim ,  Young-Il Kim ,  Jong-Sang Oh

IPC分类号： H04L12/56

CPC分类号： H04L49/30 ,  H04L49/25

摘要： A method for processing various numbers of ports in a network processor. A method for processing various numbers of ports in a network processor comprises the steps of: a) receiving the number N of ports from a system controller; b) allocating N−1 number of registers for storing N−1 number of port management information in response to the number N of ports; c) processing a packet by sequentially accessing the N number of ports; and d) after processing a packet related to a predetermined port, storing management information related to the predetermined port in a register used for the next port, and storing the management information related to the predetermined port in a first register among the N−1 number of registers when a register for storing management information in a previous packet processing is the last (N−1)-th register among the N−1 number of registers.

摘要翻译： 一种用于处理网络处理器中各种端口的方法。 一种用于在网络处理器中处理各种端口的方法，包括以下步骤：a）从系统控制器接收N个端口; b）分配N-1个用于存储N-1个端口管理信息的寄存器以响应端口数量N; c）通过顺序访问N个端口来处理分组; 以及d）在处理与预定端口相关的分组之后，将与所述预定端口相关的管理信息存储在用于下一个端口的寄存器中，并且将与所述预定端口相关的管理信息存储在第一寄存器中的N-1个数 用于存储先前分组处理中的管理信息的寄存器是N-1个寄存器中的最后（N-1）个寄存器。

公开(公告)号：US20050276920A1

公开(公告)日：2005-12-15

申请号：US11123021

申请日：2005-05-06

申请人： Su-Hyun Kim

发明人： Su-Hyun Kim

IPC分类号： H01L21/027 ,  B05B13/04 ,  B05C13/02 ,  B05D3/12 ,  H01L21/00 ,  H01L21/66 ,  H01L21/68

CPC分类号： H01L21/67259 ,  H01L21/681

摘要： Spin-coating apparatus for use in manufacturing a semiconductor device or the like and a method of operation of the apparatus prevent substrates from being positioned incorrectly in a process module of the apparatus. The spin-coating apparatus includes an image sensor that captures an image of the wafer in the process module, and a control unit that receives image data from the image sensor. The method includes loading a substrate onto a process module using an arm of a transfer device, capturing an image of the substrate using the image sensor, and comparing image data generated by the image sensor with a standard image data stored to determine an actual position of the substrate. If the substrate is incorrectly positioned, the operation of the arm of the transfer device is adjusted to compensate.

摘要翻译： 用于制造半导体器件等的旋涂装置以及该装置的操作方法防止在装置的处理模块中错误地定位基板。 旋转涂布装置包括捕获处理模块中的晶片的图像的图像传感器和从图像传感器接收图像数据的控制单元。 该方法包括使用传送装置的臂将衬底加载到处理模块上，使用图像传感器捕获衬底的图像，以及将由图像传感器生成的图像数据与存储的标准图像数据进行比较，以确定实际位置 底物。 如果基板定位不正确，则调整传送装置的臂的操作以进行补偿。

公开(公告)号：US08283787B2

公开(公告)日：2012-10-09

申请号：US12833133

申请日：2010-07-09

申请人： Won-John Choi ,  Su-Hyun Kim

发明人： Won-John Choi ,  Su-Hyun Kim

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L23/5226 ,  H01L25/0657 ,  H01L2224/85 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2924/01322

摘要： A semiconductor device includes a through-silicon-via arranged to couple a plurality of stacked semiconductor chips, an interconnection line coupled to the through-silicon-via at one side and arranged to couple the through-silicon-via to the semiconductor chip, an internal interconnection line disposed at the other side of the interconnection line and intersected with the interconnection line, and at least one first contact disposed to couple the internal interconnection line to the interconnection line. A region of the interconnection line in which the internal interconnection line is disposed is equally divided, and an area between the divided regions is removed.

摘要翻译： 半导体器件包括布置成耦合多个堆叠的半导体芯片的穿硅通孔，在一侧耦合到穿硅通孔并且布置成将穿硅通孔耦合到半导体芯片的互连线， 内部互连线设置在互连线的另一侧并与互连线相交，以及至少一个第一接触件，被设置为将内部互连线耦合到互连线。 布置内部互连线的互连线的区域被等分，并且去除分割区域之间的区域。

公开(公告)号：US20110291290A1

公开(公告)日：2011-12-01

申请号：US12833133

申请日：2010-07-09

申请人： Won-John Choi ,  Su-Hyun Kim

发明人： Won-John Choi ,  Su-Hyun Kim

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L23/5226 ,  H01L25/0657 ,  H01L2224/85 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2924/01322

摘要： A semiconductor device includes a through-silicon-via arranged to couple a plurality of stacked semiconductor chips, an interconnection line coupled to the through-silicon-via at one side and arranged to couple the through-silicon-via to the semiconductor chip, an internal interconnection line disposed at the other side of the interconnection line and intersected with the interconnection line, and at least one first contact disposed to couple the internal interconnection line to the interconnection line. A region of the interconnection line in which the internal interconnection line is disposed is equally divided, and an area between the divided regions is removed.

摘要翻译： 半导体器件包括布置成耦合多个堆叠的半导体芯片的穿硅通孔，在一侧耦合到穿硅通孔并且布置成将穿硅通孔耦合到半导体芯片的互连线， 内部互连线设置在互连线的另一侧并与互连线相交，以及至少一个第一接触件，被设置为将内部互连线耦合到互连线。 布置内部互连线的互连线的区域被等分，并且去除分割区域之间的区域。