公开(公告)号：US20190267251A1

公开(公告)日：2019-08-29

申请号：US16407266

申请日：2019-05-09

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Young Jung Lee ,  Jae-Woo Ryu ,  Byung Chun Kim ,  Robert J. Falster ,  Soon Sung Park ,  Tae Hoon Kim ,  Jun Hwan Ji ,  Carissima Marie Hudson

IPC分类号： H01L21/322 ,  H01L21/324 ,  H01L21/00 ,  C30B33/00 ,  H01L29/36 ,  C30B29/06 ,  C30B33/08 ,  C30B33/02

摘要： The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.

公开(公告)号：US09583364B2

公开(公告)日：2017-02-28

申请号：US14142556

申请日：2013-12-27

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Robert J. Falster ,  Vladimir V. Voronkov ,  John A. Pitney ,  Peter D. Albrecht

IPC分类号： H01L21/322 ,  H01L21/302 ,  H01L21/687 ,  C30B25/12

CPC分类号： H01L21/322 ,  C30B25/12 ,  H01L21/302 ,  H01L21/68735 ,  H01L21/6875

摘要： Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure.

摘要翻译： 公开了用于制备具有减小的应变的异质结构的装置和方法。 异质结构可以包括符合具有与结构不同的晶格的表面层的半导体结构，以形成相对低缺陷的异质结构。

公开(公告)号：US10453703B2

公开(公告)日：2019-10-22

申请号：US15840178

申请日：2017-12-13

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Young Jung Lee ,  Jae-Woo Ryu ,  Byung Chun Kim ,  Robert J. Falster ,  Soon Sung Park ,  Tae Hoon Kim ,  Jun Hwan Ji ,  Carissima Marie Hudson

IPC分类号： C30B29/06 ,  H01L21/322 ,  H01L29/36 ,  H01L21/324 ,  C30B33/00 ,  C30B33/02 ,  C30B33/08 ,  H01L21/00 ,  H01L21/3065 ,  H01L21/304 ,  H01L21/306

摘要： The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.

公开(公告)号：US10361097B2

公开(公告)日：2019-07-23

申请号：US14142559

申请日：2013-12-27

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Robert J. Falster ,  Vladimir V. Voronkov ,  John A. Pitney ,  Peter D. Albrecht

IPC分类号： C30B25/12 ,  H01L21/302 ,  H01L21/322 ,  H01L21/687 ,  H01L21/67 ,  H01L21/683

摘要： Apparatus for use in preparing heterostructures having a reduced concentration of defects including apparatus for stressing semiconductor substrates to allow them to conform to a crystal having a different crystal lattice constant.

公开(公告)号：US10707093B2

公开(公告)日：2020-07-07

申请号：US16407266

申请日：2019-05-09

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Young Jung Lee ,  Jae-Woo Ryu ,  Byung Chun Kim ,  Robert J. Falster ,  Soon Sung Park ,  Tae Hoon Kim ,  Jun Hwan Ji ,  Carissima Marie Hudson

IPC分类号： H01L21/322 ,  H01L29/36 ,  H01L21/324 ,  C30B29/06 ,  C30B33/00 ,  C30B33/02 ,  C30B33/08 ,  H01L21/00 ,  H01L21/3065 ,  H01L21/304 ,  H01L21/306

摘要： The disclosure is directed to a method to recover the gate oxide integrity yield of a silicon wafer after rapid thermal anneal in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2. Generally, rapid thermal anneals in an ambient atmosphere comprising a nitrogen containing gas, such as NH3 or N2 to thereby imprint an oxygen precipitate profile can degrade the GOI yield of a silicon wafer by exposing as-grown crystal defects (oxygen precipitate) and vacancies generated by the silicon nitride film. The present invention restores GOI yield by stripping the silicon nitride layer, which is followed by wafer oxidation, which is followed by stripping the silicon oxide layer.

公开(公告)号：US09583363B2

公开(公告)日：2017-02-28

申请号：US14142553

申请日：2013-12-27

申请人： SunEdison Semiconductor Limited (UEN201334164H)

发明人： Robert J. Falster ,  Vladimir V. Voronkov ,  John A. Pitney ,  Peter D. Albrecht

IPC分类号： H01L21/322 ,  H01L21/302 ,  H01L21/687 ,  C30B25/12

CPC分类号： H01L21/322 ,  C30B25/12 ,  H01L21/302 ,  H01L21/68735 ,  H01L21/6875

摘要： Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure.

摘要翻译： 公开了用于制备具有减小的应变的异质结构的装置和方法。 异质结构可以包括符合具有与结构不同的晶格的表面层的半导体结构，以形成相对低缺陷的异质结构。