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公开(公告)号：US07149674B1
公开(公告)日：2006-12-12
申请号：US09580854
申请日：2000-05-30
申请人： Supamas Sirichotiyakul , David T. Blaauw , Timothy J. Edwards , Chanhee Oh , Rajendran V. Panda , Judah L. Adelman , David Moshe , Abhijit Dharchoudhury
发明人： Supamas Sirichotiyakul , David T. Blaauw , Timothy J. Edwards , Chanhee Oh , Rajendran V. Panda , Judah L. Adelman , David Moshe , Abhijit Dharchoudhury
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5022
摘要： A method of improving performance of a dual Vt integrated circuit is disclosed in which a first value is calculated for each transistor of the integrated circuit that has a first threshold voltage level. The first value is based at least in part on delay and leakage of the circuit calculated as if the corresponding transistor had a second threshold voltage level. One transistor is then selected based on the first values. The threshold voltage of the selected transistor is then set to the second threshold voltage level. The area of at least one transistor within the circuit is modified, and the circuit is then sized to a predetermined area. The process may then be repeated if the circuit performance fails to meet a defined constraint. In one embodiment, the performance determination includes calculating the leakage current of a set of DC-connected components into which the circuit is partitioned, determining dominant logic states for each of the components, estimating the leakage of each of these dominant logic states, and summing the weighted averages of these dominant components based on state probabilities.
摘要翻译： 公开了一种提高双电位集成电路性能的方法，其中针对具有第一阈值电压电平的集成电路的每个晶体管计算第一值。 第一个值至少部分地基于如同对应的晶体管具有第二阈值电压电平那样计算的延迟和泄漏。 然后基于第一值选择一个晶体管。 然后将所选择的晶体管的阈值电压设置为第二阈值电压电平。 电路内的至少一个晶体管的面积被修改，然后将电路的尺寸设定到预定区域。 如果电路性能不能满足规定的约束，则可以重复该过程。 在一个实施例中，性能确定包括计算电路被分配到其中的一组DC连接组件的漏电流，确定每个组件的主要逻辑状态，估计这些主要逻辑状态中的每一个的泄漏，以及求和 基于状态概率的这些主成分的加权平均值。
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公开(公告)号：US5903471A
公开(公告)日：1999-05-11
申请号：US805862
申请日：1997-03-03
申请人： Satyamurthy Pullela , Timothy J. Edwards , Joseph Norton , Abhijit Dharchoudhury , David Blaauw
发明人： Satyamurthy Pullela , Timothy J. Edwards , Joseph Norton , Abhijit Dharchoudhury , David Blaauw
CPC分类号： G06F17/505
摘要： A slack time, based on a required and actual delay time, is calculated for each node in a circuit (302). For each element in the circuit, a sensitivity (304) and a figure of merit (306) is calculated. A variance is determined for the calculated figure of merits (308). The circuit element having the smallest absolute figure or merit is optimized when the variance is smaller than a predefined threshold (310, 312).
摘要翻译： 对于电路中的每个节点（302）计算基于所需和实际延迟时间的松弛时间。 对于电路中的每个元件，计算灵敏度（304）和品质因数（306）。 对于计算出的品质因数确定方差（308）。 当方差小于预定阈值（310,312）时，优化具有最小绝对值或优点的电路元件。
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公开(公告)号：US4458978A
公开(公告)日：1984-07-10
申请号：US269106
申请日：1981-06-01
CPC分类号： G03H1/00 , G03H1/0486 , G03H2001/0232
摘要： The systems of the invention form improved reflection and transmission holograms utilizing two beams and eliminating all of the higher energy spurious holographic recordings that are caused by reflections of rays from the outer surfaces of the cover plates. The systems provide movement of the cover plate or movement of the substrate and recording medium during the recording period to prevent formation of the spurious recordings. In some arrangements of the invention, global phase shifters are utilized to maintain the phase of the primary rays forming the desired hologram at a high level.
摘要翻译： 本发明的系统利用两个光束形成改进的反射和透射全息图，并消除由盖板的外表面反射的所有高能量杂散全息记录。 该系统在记录期间提供盖板的运动或基板和记录介质的运动，以防止形成杂散记录。 在本发明的一些布置中，利用全局移相器将形成期望的全息图的主光线的相位维持在高水平。
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公开(公告)号：US4456328A
公开(公告)日：1984-06-26
申请号：US269105
申请日：1981-06-01
CPC分类号： G03H1/00
摘要： The hologram forming systems of the invention form diffusion type holograms in which undesired spurious transmission hologram recordings are eliminated. The reflecting surfaces are moved during the recording process so that the reflected rays change in phase relative to the primary recording beams and spurious holograms cannot be recorded with sufficient intensity to form undesired reflections in the developed hologram. Thus, pictorial type holograms such as jewelry holograms or art holograms do not present undesired ghost images or flare patterns to the viewer. The concepts of the invention also include formation of diffusion type holograms for high gain directional viewing screens.
摘要翻译： 本发明的全息图形成系统形成扩散型全息图，其中不需要杂散透射全息图记录。 反射表面在记录过程中被移动，使得反射光线相对于初级记录光束发生相位变化，并且不能以足够的强度记录杂散全息图以在显影的全息图中形成不期望的反射。 因此，诸如首饰全息图或艺术全息图之类的图形型全息图不向观看者呈现不需要的重影图像或耀斑图案。 本发明的概念还包括形成用于高增益定向观察屏幕的扩散型全息图。
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公开(公告)号：US4458977A
公开(公告)日：1984-07-10
申请号：US269104
申请日：1981-06-01
CPC分类号： G03H1/04 , G03H1/0248 , G03H1/0486 , G03H2001/0417 , G03H2001/0439 , G03H2001/0489 , G03H2001/2655 , G03H2223/25 , G03H2260/10 , G03H2260/16
摘要： A hologram forming system for forming, from a single beam source and a reflective mirror, a reflective hologram in which spurious reflection and transmission hologram recordings are eliminated. Reflected rays are changed in phase relative to the primary beams during the recording period so that spurious holograms do not form. The remaining effect of the reflected rays is to slightly change the overall refractive index of a phase recording material (such as dichromated gelatin) with a resultant slight loss of available index of modulation or to slightly, uniformly, darken an amplitude hologram film, (such as silver halide) with a slight loss of available contrast. The invention includes hologram forming systems that move the cover plate relative to a fixed recording medium with and without a phase shifter in the primary beam and a hologram forming system that moves the substrate and mirror relative to the fixed cover plate.
摘要翻译： 一种全息图形成系统，用于从单个光束源和反射镜形成消除了伪反射和透射全息记录的反射全息图。 反射光线在记录期间相对于主光束相位改变，从而不形成杂散全息图。 反射光线的剩余影响是稍微改变相位记录材料（例如重铬酸盐明胶）的总体折射率，导致调制的可用指数的轻微损失或稍微均匀地使振幅全息图膜变暗（等等） 作为卤化银），具有轻微的可用对比度的损失。 本发明包括全息图形成系统，其使主板相对于具有和不具有移相器的固定记录介质相对于固定记录介质移动，以及使基板和反射镜相对于固定盖板移动的全息图形成系统。
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