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    Trench isolation structure having different stress
    3.
    发明授权
    Trench isolation structure having different stress 有权
    具有不同应力的沟槽隔离结构

    公开(公告)号：US08158486B2

    公开(公告)日：2012-04-17

    申请号：US11537809

    申请日：2006-10-02

    申请人： Ralf Van Bentum ,  Klaus Hempel ,  Roland Stejskal

    发明人： Ralf Van Bentum ,  Klaus Hempel ,  Roland Stejskal

    IPC分类号： H01L21/76

    CPC分类号： H01L21/823481 ,  H01L21/76237 ,  H01L21/823412 ,  H01L29/7846

    摘要： By locally heating isolation trenches with different annealing conditions, a different magnitude of intrinsic stress may be obtained in different isolation trenches. In some illustrative embodiments, the different anneal temperature may be achieved on the basis of an appropriate mask layer, which may provide a patterned optical response for a lamp-based or laser-based anneal process. Consequently, the intrinsic stress of isolation trenches may be specifically adapted to the requirements of circuit elements, such as N-channel transistors and P-channel transistors.

    摘要翻译： 通过局部加热具有不同退火条件的隔离沟槽，可以在不同的隔离沟槽中获得不同大小的固有应力。 在一些说明性实施例中，可以基于合适的掩模层来实现不同的退火温度，其可以为基于灯或基于激光的退火工艺提供图案化的光学响应。 因此，隔离沟槽的固有应力可以特别适用于诸如N沟道晶体管和P沟道晶体管的电路元件的要求。

    TRENCH ISOLATION STRUCTURE HAVING DIFFERENT STRESS
    4.
    发明申请
    TRENCH ISOLATION STRUCTURE HAVING DIFFERENT STRESS 有权
    具有不同应力的高温隔离结构

    公开(公告)号：US20070155122A1

    公开(公告)日：2007-07-05

    申请号：US11537809

    申请日：2006-10-02

    申请人： Ralf Van Bentum ,  Klaus Hempel ,  Roland Stejskal

    发明人： Ralf Van Bentum ,  Klaus Hempel ,  Roland Stejskal

    IPC分类号： H01L21/76

    CPC分类号： H01L21/823481 ,  H01L21/76237 ,  H01L21/823412 ,  H01L29/7846

    摘要： By locally heating isolation trenches with different annealing conditions, a different magnitude of intrinsic stress may be obtained in different isolation trenches. In some illustrative embodiments, the different anneal temperature may be achieved on the basis of an appropriate mask layer, which may provide a patterned optical response for a lamp-based or laser-based anneal process. Consequently, the intrinsic stress of isolation trenches may be specifically adapted to the requirements of circuit elements, such as N-channel transistors and P-channel transistors.

    摘要翻译： 通过局部加热具有不同退火条件的隔离沟槽，可以在不同的隔离沟槽中获得不同大小的固有应力。 在一些说明性实施例中，可以基于合适的掩模层来实现不同的退火温度，其可以为基于灯或基于激光的退火工艺提供图案化的光学响应。 因此，隔离沟槽的固有应力可以特别适用于诸如N沟道晶体管和P沟道晶体管的电路元件的要求。

    Method of patterning gate electrodes by reducing sidewall angles of a mask layer
    5.
    发明授权
    Method of patterning gate electrodes by reducing sidewall angles of a mask layer 有权
    通过减小掩模层的侧壁角来图案化栅电极的方法

    公开(公告)号：US07858526B2

    公开(公告)日：2010-12-28

    申请号：US11672329

    申请日：2007-02-07

    申请人： Roland Stejskal ,  Stephan Kruegel ,  Markus Lenski

    发明人： Roland Stejskal ,  Stephan Kruegel ,  Markus Lenski

    IPC分类号： H01L21/302 ,  C03C15/00

    CPC分类号： H01L21/28123 ,  H01L29/78

    摘要： By performing an anisotropic resist modification prior to the actual resist trimming process, the profile of the end portions of the resist features may be significantly enhanced, for instance by providing substantially vertical sidewall portions. Consequently, an overlap of gate electrodes with the respective isolation structures may be obtained, while nevertheless the probability for a short circuit between opposing end portions of the gate electrodes may be significantly reduced, thereby providing the potential for further scaling down device dimensions.

    摘要翻译： 通过在实际的抗蚀剂修剪工艺之前进行各向异性抗蚀剂改性，例如通过提供基本上垂直的侧壁部分，可以显着地增强抗蚀剂特征端部的轮廓。 因此，可以获得栅极与各个隔离结构的重叠，然而，可以显着减小栅电极的相对端部之间的短路的可能性，从而提供进一步缩小器件尺寸的可能性。

    METHOD OF PATTERNING GATE ELECTRODES BY REDUCING SIDEWALL ANGLES OF A MASK LAYER
    6.
    发明申请
    METHOD OF PATTERNING GATE ELECTRODES BY REDUCING SIDEWALL ANGLES OF A MASK LAYER 有权
    通过减少掩模层的角度来绘制栅极电极的方法

    公开(公告)号：US20080003825A1

    公开(公告)日：2008-01-03

    申请号：US11672329

    申请日：2007-02-07

    申请人： Roland Stejskal ,  Stephan Kruegel ,  Markus Lenski

    发明人： Roland Stejskal ,  Stephan Kruegel ,  Markus Lenski

    IPC分类号： H01L21/302

    CPC分类号： H01L21/28123 ,  H01L29/78

    摘要： By performing an anisotropic resist modification prior to the actual resist trimming process, the profile of the end portions of the resist features may be significantly enhanced, for instance by providing substantially vertical sidewall portions. Consequently, an overlap of gate electrodes with the respective isolation structures may be obtained, while nevertheless the probability for a short circuit between opposing end portions of the gate electrodes may be significantly reduced, thereby providing the potential for further scaling down device dimensions.

    摘要翻译： 通过在实际的抗蚀剂修剪工艺之前进行各向异性抗蚀剂改性，例如通过提供基本上垂直的侧壁部分，可以显着地增强抗蚀剂特征端部的轮廓。 因此，可以获得栅极与各个隔离结构的重叠，然而，可以显着减小栅电极的相对端部之间的短路的可能性，从而提供进一步缩小器件尺寸的可能性。