公开(公告)号：US20120211751A1

公开(公告)日：2012-08-23

申请号：US13236329

申请日：2011-09-19

申请人： Swae-Hyun Kim ,  YeoGeon Yoon ,  Jae Hwa Park ,  Changil Tae

发明人： Swae-Hyun Kim ,  YeoGeon Yoon ,  Jae Hwa Park ,  Changil Tae

IPC分类号： H01L33/08 ,  H01L21/336

CPC分类号： H01L27/1225

摘要： A display apparatus includes a substrate and a plurality of pixels disposed on the substrate. Each pixel includes a gate electrode disposed on the substrate, a gate dielectric layer disposed on the substrate and the gate electrode, an oxide semiconductor pattern disposed on the gate dielectric layer, a first insulating pattern disposed on the oxide semiconductor pattern that overlaps the gate electrode, a second insulating pattern disposed on the oxide semiconductor pattern and spaced apart from the first insulating pattern, source and drain electrodes spaced apart from each other on the oxide semiconductor pattern, a pixel electrode pattern disposed on the second insulating pattern to make contact with the source electrode, and a channel area defined where the oxide semiconductor pattern overlaps the gate electrode. A high carrier mobility channel is formed in the channel area when a turn-on voltage is applied to the gate electrode.

摘要翻译： 显示装置包括基板和设置在基板上的多个像素。 每个像素包括设置在基板上的栅极电极，设置在基板上的栅极介电层和栅极电极，设置在栅极介电层上的氧化物半导体图案，设置在氧化物半导体图案上的与栅电极重叠的第一绝缘图案 ，设置在所述氧化物半导体图案上并与所述第一绝缘图案间隔开的第二绝缘图案，在所述氧化物半导体图案上彼此间隔开的源极和漏极，设置在所述第二绝缘图案上以与所述第二绝缘图案接触的像素电极图案 源电极和限定在氧化物半导体图案与栅电极重叠的沟道区。 当导通电压施加到栅电极时，在沟道区中形成高载流子迁移率通道。

公开(公告)号：US09001007B2

公开(公告)日：2015-04-07

申请号：US13312270

申请日：2011-12-06

申请人： Jae Hwa Park ,  YeoGeon Yoon ,  Swae-Hyun Kim ,  Changil Tae

发明人： Jae Hwa Park ,  YeoGeon Yoon ,  Swae-Hyun Kim ,  Changil Tae

IPC分类号： G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3607 ,  G09G2300/0447 ,  G09G2300/0452 ,  G09G2300/0809 ,  G09G2320/028 ,  G09G2340/06

摘要： A display panel includes: a first base substrate on which a plurality of pixel areas are defined; a color filter layer including a plurality of color filters respectively in the plurality of pixel areas of the first base substrate, where four color filters having different colors are respectively in four pixel areas adjacent to each other; a plurality of pixel electrodes on the color filter layer, respectively in the plurality of pixel areas and electrically insulated from each other; a first area including a contact point at which the four adjacent pixel areas meet; a second base substrate which is combined with the first base substrate and faces the second base substrate; and a reference electrode on one of the first and second base substrates. At least one color filter among the four adjacent color filters includes a protruding part which overlaps the first area.

摘要翻译： 显示面板包括：第一基底，其上限定有多个像素区域; 分别在第一基板的多个像素区域中包括多个滤色器的滤色器层，其中具有不同颜色的四个滤色器分别在彼此相邻的四个像素区域中; 分别在所述多个像素区域中的所述滤色器层上的多个像素电极，并且彼此电绝缘; 第一区域，其包括四个相邻像素区域相交的接触点; 第二基底，其与所述第一基底基板组合并面对所述第二基底; 以及在第一和第二基底基板之一上的参考电极。 四个相邻滤色器中的至少一个滤色器包括与第一区域重叠的突出部分。

公开(公告)号：US08614443B2

公开(公告)日：2013-12-24

申请号：US13236329

申请日：2011-09-19

申请人： Swae-Hyun Kim ,  YeoGeon Yoon ,  Jae Hwa Park ,  Changil Tae

发明人： Swae-Hyun Kim ,  YeoGeon Yoon ,  Jae Hwa Park ,  Changil Tae

IPC分类号： H01L29/12 ,  H01L27/088 ,  H01L29/10

CPC分类号： H01L27/1225

摘要： A display apparatus includes a substrate and a plurality of pixels disposed on the substrate. Each pixel includes a gate electrode disposed on the substrate, a gate dielectric layer disposed on the substrate and the gate electrode, an oxide semiconductor pattern disposed on the gate dielectric layer, a first insulating pattern disposed on the oxide semiconductor pattern that overlaps the gate electrode, a second insulating pattern disposed on the oxide semiconductor pattern and spaced apart from the first insulating pattern, source and drain electrodes spaced apart from each other on the oxide semiconductor pattern, a pixel electrode pattern disposed on the second insulating pattern to make contact with the source electrode, and a channel area defined where the oxide semiconductor pattern overlaps the gate electrode. A high carrier mobility channel is formed in the channel area when a turn-on voltage is applied to the gate electrode.

摘要翻译： 显示装置包括基板和设置在基板上的多个像素。 每个像素包括设置在基板上的栅极电极，设置在基板上的栅极介电层和栅极电极，设置在栅极介电层上的氧化物半导体图案，设置在氧化物半导体图案上的与栅电极重叠的第一绝缘图案 ，设置在所述氧化物半导体图案上并与所述第一绝缘图案间隔开的第二绝缘图案，在所述氧化物半导体图案上彼此间隔开的源极和漏极，设置在所述第二绝缘图案上以与所述第二绝缘图案接触的像素电极图案 源电极和限定在氧化物半导体图案与栅电极重叠的沟道区。 当导通电压施加到栅电极时，在沟道区中形成高载流子迁移率通道。