公开(公告)号：US11574900B2

公开(公告)日：2023-02-07

申请号：US16910658

申请日：2020-06-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Liang Chen ,  Shun Li Chen ,  Li-Chun Tien ,  Ting Yu Chen ,  Hui-Zhong Zhuang

IPC: H01L27/02 ,  G06F30/392 ,  H01L27/092

Abstract: A method includes generating a layout diagram of a cell of an integrated circuit (IC), and storing the generated layout diagram on a non-transitory computer-readable medium. In the generating the layout diagram of the cell, a first active region is arranged inside a boundary of the cell. The first active region extends along a first direction. At least one gate region is arranged inside the boundary. The at least one gate region extends across the first active region along a second direction transverse to the first direction. A first conductive region is arranged to overlap the first active region and a first edge of the boundary. The first conductive region is configured to form an electrical connection to the first active region.

公开(公告)号：US12125840B2

公开(公告)日：2024-10-22

申请号：US18156605

申请日：2023-01-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Liang Chen ,  Shun Li Chen ,  Li-Chun Tien ,  Ting Yu Chen ,  Hui-Zhong Zhuang

IPC: H01L27/02 ,  G06F30/392 ,  H01L27/092

CPC classification number: H01L27/0207 ,  G06F30/392 ,  H01L27/092

Abstract: A non-transitory computer-readable medium contains thereon a cell library. The cell library includes a plurality of cells configured to be placed in a layout diagram of an integrated circuit (IC). Each cell among the plurality of cells includes a first active region inside a boundary of the cell. The first active region extends along a first direction. At least one gate region is inside the boundary. The at least one gate region extends across the first active region along a second direction transverse to the first direction. A first conductive region overlaps the first active region and a first edge of the boundary. The first conductive region is configured to form an electrical connection to the first active region. The plurality of cells includes at least one cell a width of which in the first direction is equal to one gate region pitch between adjacent gate regions of the IC.