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Patent Agency Ranking
公开(公告)号：US20240312387A1
公开(公告)日：2024-09-19
申请号：US17598889
申请日：2021-07-28
Inventor： Xiaowen LV
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0267 , G09G2310/08
Abstract: A gate driver on array (GOA) circuit includes a first GOA unit. The first GOA circuit includes a first pull-up control module that includes a first transistor, having a gate receiving a control signal, a source receiving a starting signal, and a drain electrically connected to a first node. When the first transistor is turned off, a voltage level of the gate of the first transistor is lower than a voltage level of the source; the source of the first transistor is an end for signal inputting; and the drain of the first transistor is an end for signal outputting.
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公开(公告)号：US20220309975A1
公开(公告)日：2022-09-29
申请号：US16755816
申请日：2020-03-10
Inventor： Xiaowen LV
IPC: G09G3/20
Abstract: The present invention provides a driving circuit and a display panel including at least two gate driving units, and at least two of the gate driving units are connected in a cascade arrangement. an Nth stage driving unit in the at least two of the gate driving units includes a pull-up control module, a pull-up module, a pull-down module, a pull-down maintaining module, and a bootstrap capacitor, wherein N is an integer greater than 0.
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公开(公告)号：US20200212225A1
公开(公告)日：2020-07-02
申请号：US16811056
申请日：2020-03-06
Inventor： Yutong HU , Chihyuan TSENG , Chihyu SU , Wenhui LI , Xiaowen LV , Longqiang SHI , Hejing ZHANG
IPC: H01L29/786 , H01L29/06 , H01L27/12 , H01L29/66
Abstract: A structure of an oxide thin film transistor includes: an oxide semiconducting layer, an etching stopper layer on the oxide semiconducting layer, and a source and a drain on the etching stopper layer. Two vias are formed in the etching stopper layer. The oxide semiconducting layer includes two recesses formed therein to extend through a skin layer of the oxide semiconducting layer and respectively corresponding to the two vias. The two recesses are respectively connected with and in communication with the two vias. The source and the drain are respectively filled in the two vias and the two recesses connected with the two vias to directly connect to and physically contact the oxide semiconducting layer.
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公开(公告)号：US20240053639A1
公开(公告)日：2024-02-15
申请号：US17602756
申请日：2021-08-10
Inventor： Liang LI , Zui WANG , Xiaowen LV
IPC: G02F1/1339 , G02F1/1345
CPC classification number: G02F1/1339 , G02F1/13458 , G02F1/13452
Abstract: A display panel and a liquid crystal display device are provided. The display panel includes a first substrate and a second substrate, a sealant, a display layer, a circuit layer, and an organic film layer. The organic film layer includes vias and planarization portions arranged adjoining the vias. A first conductive layer includes conductive pads, and each conductive pad covers a signal line in at least one via and the planarization portion adjoining the vias. A second conductive layer is disposed on one side of the second substrate. A conductive ball of the sealant is located on the planarization portions and contact the first conductive layer and the second conductive layer. The signal line is electrically connected to the second conductive layer through the conductive pad and the conductive ball.
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公开(公告)号：US20210335206A1
公开(公告)日：2021-10-28
申请号：US16979876
申请日：2020-06-16
Inventor： Haiyan QUAN , Xiaowen LV
IPC: G09G3/20
Abstract: A gate-on-array (GOA) driving circuit is provided, and the GOA driving circuit includes a plurality of cascading GOA driving units. Each of the GOA driving units further includes a first GOA driving sub-unit including a first signal source and a second GOA driving sub-unit including a second signal source. The first GOA driving sub-unit operates when the first signal source transmits a first signal with a high voltage, and the second GOA driving sub-unit transmitting a second signal operates when the first signal source transmits the first signal with a low voltage.
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