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公开(公告)号:US20170250699A1
公开(公告)日:2017-08-31
申请号:US15483046
申请日:2017-04-10
CPC分类号: H03M1/1071 , H03M1/1038 , H03M1/466 , H03M1/468 , H03M5/00 , H03M7/165
摘要: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.
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公开(公告)号:US09654131B1
公开(公告)日:2017-05-16
申请号:US15054220
申请日:2016-02-26
CPC分类号: H03M1/1071 , H03M1/1038 , H03M1/466 , H03M1/468 , H03M5/00 , H03M7/165
摘要: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.
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