公开(公告)号：US11296691B2

公开(公告)日：2022-04-05

申请号：US16867392

申请日：2020-05-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amneh Mohammad Akour ,  Nikolaus Klemmer

IPC: H03K17/22 ,  G06F1/24

Abstract: A power-on-reset (POR) circuit for CMOS logic is operable to transition between a POR_active state and a POR_inactive state and can include: (a) VDD/VT threshold circuitry to provide a Vtp_threshold voltage based on input Vdd and PMOS Vtp, and a Vtn_threshold voltage based on input Vdd and NMOS Vtn; (b) POR transition detect circuitry to provide a POR_transition signal (active/inactive) based on a function (Vtp, Vtn), which is a function of Vtp_threshold and Vtn_threshold; and (c) POR transition control circuitry to provide the POR_state signal (active/inactive) based on the POR_transition signal. For a POR out-of-reset transition, the POR transition detect circuitry to switch the POR_transition signal inactive based on the function (Vtp, Vtn) corresponding to the POR_inactive state, and the POR transition control circuitry, responsive to the POR_transition signal switching to inactive, to initiate a POR out-of-reset delay period, and to signal the POR_inactive state after the POR out-of-reset delay period.

公开(公告)号：US20200266814A1

公开(公告)日：2020-08-20

申请号：US16867392

申请日：2020-05-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amneh Mohammad Akour ,  Nikolaus Klemmer

IPC: H03K17/22

Abstract: A power-on-reset (POR) circuit for CMOS logic is operable to transition between a POR_active state and a POR_inactive state and can include: (a) VDD/VT threshold circuitry to provide a Vtp_threshold voltage based on input Vdd and PMOS Vtp, and a Vtn_threshold voltage based on input Vdd and NMOS Vtn; (b) POR transition detect circuitry to provide a POR_transition signal (active/inactive) based on a function(Vtp,Vtn), which is a function of Vtp_threshold and Vtn_threshold; and (c) POR transition control circuitry to provide the POR_state signal (active/inactive) based on the POR_transition signal. For a POR out-of-reset transition, the POR transition detect circuitry to switch the POR_transition signal inactive based on the function (Vtp,Vtn) corresponding to the POR_inactive state, and the POR transition control circuitry, responsive to the POR_transition signal switching to inactive, to initiate a POR out-of-reset delay period, and to signal the POR_inactive state after the POR out-of-reset delay period.

公开(公告)号：US20170111039A1

公开(公告)日：2017-04-20

申请号：US15299458

申请日：2016-10-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Amneh Mohammad Akour ,  Nikolaus Klemmer

IPC: H03K17/22

CPC classification number: H03K17/223

Abstract: A power-on-reset (POR) circuit is suitable for use in an integrated circuit including at least one CMOS logic block that includes PMOS and NMOS transistors respectively characterized by threshold voltages Vtp and Vtn, the CMOS circuitry operable with a power supply voltage Vdd. The POR circuit is operable to transition between a POR_active state and a POR_inactive state, including outputting a corresponding POR_state signal. The POR circuit includes: (a) VDD/VT threshold circuitry coupled to receive the Vdd voltage as an input to the POR circuit, and to provide a Vtp_threshold voltage based on Vdd and Vtp, and a Vtn_threshold voltage based on Vdd and Vtn; (b) POR transition detect circuitry coupled to the VDD/VT threshold circuitry to provide a POR_transition signal based on a function(Vtp,Vtn), which is a function of Vtp_threshold and Vtn_threshold; and (c) POR transition control circuitry coupled to the POR transition detect circuitry to provide the POW_state signal based on the POR_transition signal. For a POR out-of-reset transition of the POR_state signal from POR_active to POR_inactive, the POR transition detect circuitry is operable to switch the POR_transition signal from active to inactive based on the function (Vtp,Vtn) corresponding to the POR_inactive state, and the POR transition control circuitry is operable, in response to the POR_transition signal switching to inactive, to initiate a POR out-of-reset delay period, and to generate the POR_inactive signal after the POR out-of-reset delay period.