公开(公告)号：US11467832B2

公开(公告)日：2022-10-11

申请号：US17215032

申请日：2021-03-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06K9/62

Abstract: A method to classify source data in a processor in response to a vector floating-point classification instruction includes specifying, in respective fields of the vector floating-point classification instruction, a source register containing the source data and a destination register to store classification indications for the source data. The source register includes a plurality of lanes that each contains a floating-point value and the destination register includes a plurality of lanes corresponding to the lanes of the source register. The method further includes executing the vector floating-point classification instruction by, for each lane in the source register, classifying the floating-point value in the lane to identify a type of the floating-point value, and storing a value indicative of the identified type in the corresponding lane of the destination register.

公开(公告)号：US20240020121A1

公开(公告)日：2024-01-18

申请号：US18476604

申请日：2023-09-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06F18/24

CPC classification number: G06F9/30036 ,  G06F9/3013 ,  G06F18/24

Abstract: A processor includes a functional unit, and a set of vector registers coupled to the functional unit. The processor executes an instruction to cause the functional unit to classify each value of multiple floating-point values stored in a first vector register of the set of vector registers, and store in a second vector register of the set of registers multiple elements that each indicate a respective classification of a respective value of the multiple floating-point values. The first and second vector registers may be source and destination vector registers, and each may be specified by the instruction. The classify and store operations may also be specified by the instruction. The instruction may be embodied on a device-readable medium.

公开(公告)号：US20230042884A1

公开(公告)日：2023-02-09

申请号：US17963317

申请日：2022-10-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06K9/62

Abstract: A method to classify source data in a processor in response to a vector floating-point classification instruction includes specifying, in respective fields of the vector floating-point classification instruction, a source register containing the source data and a destination register to store classification indications for the source data. The source register includes a plurality of lanes that each contains a floating-point value and the destination register includes a plurality of lanes corresponding to the lanes of the source register. The method further includes executing the vector floating-point classification instruction by, for each lane in the source register, classifying the floating-point value in the lane to identify a type of the floating-point value, and storing a value indicative of the identified type in the corresponding lane of the destination register.

公开(公告)号：US20250053420A1

公开(公告)日：2025-02-13

申请号：US18928702

申请日：2024-10-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06F18/24

Abstract: Systems and methods enable the classification of each value of multiple floating-point values stored in a first vector register, and storage in a second vector register multiple elements that each indicate a respective classification of a respective value of the multiple floating-point values. A system includes a functional unit, first and second vector registers coupled to the functional unit, and processing circuitry. The processing circuitry is configurable, e.g., via an instruction, to cause the functional unit to perform the classification and storage operations.

公开(公告)号：US11803379B2

公开(公告)日：2023-10-31

申请号：US17963317

申请日：2022-10-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06F18/24

CPC classification number: G06F9/30036 ,  G06F9/3013 ,  G06F18/24

Abstract: A method to classify source data in a processor in response to a vector floating-point classification instruction includes specifying, in respective fields of the vector floating-point classification instruction, a source register containing the source data and a destination register to store classification indications for the source data. The source register includes a plurality of lanes that each contains a floating-point value and the destination register includes a plurality of lanes corresponding to the lanes of the source register. The method further includes executing the vector floating-point classification instruction by, for each lane in the source register, classifying the floating-point value in the lane to identify a type of the floating-point value, and storing a value indicative of the identified type in the corresponding lane of the destination register.

公开(公告)号：US20210216319A1

公开(公告)日：2021-07-15

申请号：US17215032

申请日：2021-03-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06K9/62

Abstract: A method to classify source data in a processor in response to a vector floating-point classification instruction includes specifying, in respective fields of the vector floating-point classification instruction, a source register containing the source data and a destination register to store classification indications for the source data. The source register includes a plurality of lanes that each contains a floating-point value and the destination register includes a plurality of lanes corresponding to the lanes of the source register. The method further includes executing the vector floating-point classification instruction by, for each lane in the source register, classifying the floating-point value in the lane to identify a type of the floating-point value, and storing a value indicative of the identified type in the corresponding lane of the destination register.

公开(公告)号：US10963247B2

公开(公告)日：2021-03-30

申请号：US16422688

申请日：2019-05-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joseph Zbiciak ,  Brett L. Huber ,  Duc Bui

IPC: G06F9/30 ,  G06K9/62

Abstract: A method to classify source data in a processor in response to a vector floating-point classification instruction includes specifying, in respective fields of the vector floating-point classification instruction, a source register containing the source data and a destination register to store classification indications for the source data. The source register includes a plurality of lanes that each contains a floating-point value and the destination register includes a plurality of lanes corresponding to the lanes of the source register. The method further includes executing the vector floating-point classification instruction by, for each lane in the source register, classifying the floating-point value in the lane to identify a type of the floating-point value, and storing a value indicative of the identified type in the corresponding lane of the destination register.