公开(公告)号：US20230035151A1

公开(公告)日：2023-02-02

申请号：US17390539

申请日：2021-07-30

Applicant: Texas Instruments Incorporated

Inventor： Ammineni Balaji ,  Preetam Charan Anand Tadeparthy ,  Naman Bafna ,  Sreelakshmi Suresh ,  Cheng Wei Chen

IPC: H02M1/32 ,  H02M3/155 ,  H03K5/24 ,  H02M1/08

Abstract: Described embodiments include a voltage regulator circuit comprising a first comparator having a first comparator input coupled to a waveform input source, a second comparator input coupled to an output voltage terminal and a first comparator output. There is a second comparator having third and fourth comparator inputs and a second comparator output, the third comparator input coupled to a voltage source configured to provide a voltage representing a current limit, and the fourth comparator input coupled to the output voltage terminal. There is also a state machine having a first state machine input coupled to the first comparator output, a second state machine input coupled to the second comparator output and a state machine output, wherein a state of the state machine is determined by the first and second comparator outputs, and the state machine output provides a PWM signal responsive to the state of the state machine.

公开(公告)号：US11757351B2

公开(公告)日：2023-09-12

申请号：US17390539

申请日：2021-07-30

Applicant: Texas Instruments Incorporated

Inventor： Ammineni Balaji ,  Preetam Charan Anand Tadeparthy ,  Naman Bafna ,  Sreelakshmi Suresh ,  Cheng Wei Chen

IPC: H02M1/32 ,  H03K5/24 ,  H02M3/155

CPC classification number: H02M1/32 ,  H02M3/155 ,  H03K5/24

Abstract: Described embodiments include a voltage regulator circuit comprising a first comparator having a first comparator input coupled to a waveform input source, a second comparator input coupled to an output voltage terminal and a first comparator output. There is a second comparator having third and fourth comparator inputs and a second comparator output, the third comparator input coupled to a voltage source configured to provide a voltage representing a current limit, and the fourth comparator input coupled to the output voltage terminal. There is also a state machine having a first state machine input coupled to the first comparator output, a second state machine input coupled to the second comparator output and a state machine output, wherein a state of the state machine is determined by the first and second comparator outputs, and the state machine output provides a PWM signal responsive to the state of the state machine.

公开(公告)号：US20230130783A1

公开(公告)日：2023-04-27

申请号：US17682747

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Naman BAFNA ,  Cheng Wei Chen ,  Preetam Charan Anand Tadeparthy ,  Sreelakshmi Suresh ,  Ammineni Balaji Balaji

IPC: H02M3/158 ,  H02M1/00

Abstract: An example circuit includes a loop controller having current phase inputs, a feedback input, a control loop output and a transient event output. The feedback input is adapted to be coupled to an output terminal of a multi-phase power stage. A PWM circuit has a blanking input, a control input and a PWM output, the control input coupled to the control loop output. A phase management circuit has a transient detect input, a PWM input, a blanking output and phase outputs. The transient detect input is coupled to the transient event output. The PWM input is coupled to the PWM output and the blanking output is coupled to the blanking input. Each of the phase outputs is adapted to be coupled to a respective phase of the multi-phase power stage. The phase management circuit is configured to provide a blanking control signal representative of a variable blanking time.

公开(公告)号：US11811326B2

公开(公告)日：2023-11-07

申请号：US17682747

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Naman Bafna ,  Cheng Wei Chen ,  Preetam Charan Anand Tadeparthy ,  Sreelakshmi Suresh ,  Ammineni Balaji

IPC: H02M3/158 ,  H02M1/00 ,  H02M3/156

CPC classification number: H02M3/1586 ,  H02M1/0003 ,  H02M3/1584 ,  H02M3/1566

Abstract: An example circuit includes a loop controller having current phase inputs, a feedback input, a control loop output and a transient event output. The feedback input is adapted to be coupled to an output terminal of a multi-phase power stage. A PWM circuit has a blanking input, a control input and a PWM output, the control input coupled to the control loop output. A phase management circuit has a transient detect input, a PWM input, a blanking output and phase outputs. The transient detect input is coupled to the transient event output. The PWM input is coupled to the PWM output and the blanking output is coupled to the blanking input. Each of the phase outputs is adapted to be coupled to a respective phase of the multi-phase power stage. The phase management circuit is configured to provide a blanking control signal representative of a variable blanking time.