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    Multi-output digital to analog converter
    1.
    发明授权
    Multi-output digital to analog converter 有权

    公开(公告)号：US10897267B1

    公开(公告)日：2021-01-19

    申请号：US16731280

    申请日：2019-12-31

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Naman Bafna ,  Muthusubramanian Venkateswaran ,  Rohit Narula

    IPC: H03M1/66 ,  H03M1/68 ,  H03M1/76 ,  H03M1/74

    Abstract: A circuit includes a first voltage divider having a set of most significant bit (MSB) outputs each representative of a value of a MSB portion of a digital code. The circuit also includes a second voltage divider having a first upper voltage input configured to couple to a first one of a first pair of outputs of the set of MSB outputs, and a first lower voltage input configured to couple to a second one of the first pair of outputs of the set of MSB outputs. The circuit also includes a third voltage divider having a second upper voltage input configured to couple to a first one of a second pair of outputs of the set of MSB outputs, and a second lower voltage input configured to couple to a second one of the second pair of outputs of the set of MSB outputs.

    DYNAMIC OVERCURRENT LIMIT THRESHOLD
    3.
    发明申请
    DYNAMIC OVERCURRENT LIMIT THRESHOLD 有权

    公开(公告)号：US20230035151A1

    公开(公告)日：2023-02-02

    申请号：US17390539

    申请日：2021-07-30

    Applicant: Texas Instruments Incorporated

    Inventor： Ammineni Balaji ,  Preetam Charan Anand Tadeparthy ,  Naman Bafna ,  Sreelakshmi Suresh ,  Cheng Wei Chen

    IPC: H02M1/32 ,  H02M3/155 ,  H03K5/24 ,  H02M1/08

    Abstract: Described embodiments include a voltage regulator circuit comprising a first comparator having a first comparator input coupled to a waveform input source, a second comparator input coupled to an output voltage terminal and a first comparator output. There is a second comparator having third and fourth comparator inputs and a second comparator output, the third comparator input coupled to a voltage source configured to provide a voltage representing a current limit, and the fourth comparator input coupled to the output voltage terminal. There is also a state machine having a first state machine input coupled to the first comparator output, a second state machine input coupled to the second comparator output and a state machine output, wherein a state of the state machine is determined by the first and second comparator outputs, and the state machine output provides a PWM signal responsive to the state of the state machine.

    POWER CONVERTER CONTROL
    4.
    发明公开
    POWER CONVERTER CONTROL 审中-公开

    公开(公告)号：US20240039402A1

    公开(公告)日：2024-02-01

    申请号：US18376230

    申请日：2023-10-03

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Naman Bafna ,  Muthusubramanian Venkateswaran ,  Mayank Jain ,  Vikram Gakhar ,  Vikas Lakhanpal ,  Preetam Charan Anand Tadeparthy ,  Pamidi Ramasiddaiah

    IPC: H02M3/155 ,  H03K5/24 ,  H02M1/08

    CPC classification number: H02M3/155 ,  H03K5/24 ,  H02M1/08

    Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

    Dynamic overcurrent limit threshold for a voltage regulator
    5.
    发明授权
    Dynamic overcurrent limit threshold for a voltage regulator 有权

    公开(公告)号：US11757351B2

    公开(公告)日：2023-09-12

    申请号：US17390539

    申请日：2021-07-30

    Applicant: Texas Instruments Incorporated

    Inventor： Ammineni Balaji ,  Preetam Charan Anand Tadeparthy ,  Naman Bafna ,  Sreelakshmi Suresh ,  Cheng Wei Chen

    IPC: H02M1/32 ,  H03K5/24 ,  H02M3/155

    CPC classification number: H02M1/32 ,  H02M3/155 ,  H03K5/24

    Abstract: Described embodiments include a voltage regulator circuit comprising a first comparator having a first comparator input coupled to a waveform input source, a second comparator input coupled to an output voltage terminal and a first comparator output. There is a second comparator having third and fourth comparator inputs and a second comparator output, the third comparator input coupled to a voltage source configured to provide a voltage representing a current limit, and the fourth comparator input coupled to the output voltage terminal. There is also a state machine having a first state machine input coupled to the first comparator output, a second state machine input coupled to the second comparator output and a state machine output, wherein a state of the state machine is determined by the first and second comparator outputs, and the state machine output provides a PWM signal responsive to the state of the state machine.

    CURRENT LIMIT FOR MULTIPHASE POWER CONVERTERS
    6.
    发明申请
    CURRENT LIMIT FOR MULTIPHASE POWER CONVERTERS 有权

    公开(公告)号：US20250062678A1

    公开(公告)日：2025-02-20

    申请号：US18425138

    申请日：2024-01-29

    Applicant: Texas Instruments Incorporated

    Inventor： Ramakrishnan Venkatraman ,  Vikram Gakhar ,  Nischal R ,  Amrutheshwara Rao KV ,  Madhura Nasare ,  Naman Bafna

    IPC: H02M1/088 ,  H02M3/158

    Abstract: Described embodiments include a control circuit with a first comparator having a first comparator input receiving a first threshold voltage, and a second comparator input coupled to an output voltage terminal. A second comparator has a third comparator input receiving a second threshold voltage, and a fourth comparator input coupled to a current output terminal. A first logic circuit provides a true signal at its output responsive to a particular number of its inputs receiving a true input. A second logic circuit has inputs coupled to the first comparator output, and to the first logic output. A variable resistance circuit has an output coupled to a mode detection output. An amplifier has inputs coupled to the variable resistance circuit output, and a third reference voltage source. A duty cycle generation circuit provides a respective pulse width modulation (PWM) signal at each of its respective duty cycle outputs.

    Power regulator with variable rate integrator
    8.
    发明授权
    Power regulator with variable rate integrator 有权

    公开(公告)号：US11711016B2

    公开(公告)日：2023-07-25

    申请号：US17489782

    申请日：2021-09-30

    Applicant: Texas Instruments Incorporated

    Inventor： Naman Bafna ,  Preetam Charan Anand Tadeparthy ,  Ammineni Balaji ,  Sreelakshmi Suresh

    IPC: H02M3/158 ,  H02M1/00

    CPC classification number: H02M3/158 ,  H02M1/0025

    Abstract: In described examples of a system having a proportional-integral control module, an error signal is produced that is indicative of a difference between a reference signal and an output signal. An integral control signal is produced by integrating the error signal using an integrator time constant value. During a steady state condition, a first integrator time constant value is used. When an undershoot in the output signal is detected, the integrator time constant value is increased to a second time constant value that is larger than the first integrator time constant value during the undershoot condition. The integrator time constant value is reduced to a third integrator time constant value that is less than the first integrator time constant value during a period following the undershoot condition.

    Reducing transients for multiphase power regulators
    9.
    发明授权
    Reducing transients for multiphase power regulators 有权

    公开(公告)号：US11811326B2

    公开(公告)日：2023-11-07

    申请号：US17682747

    申请日：2022-02-28

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Naman Bafna ,  Cheng Wei Chen ,  Preetam Charan Anand Tadeparthy ,  Sreelakshmi Suresh ,  Ammineni Balaji

    IPC: H02M3/158 ,  H02M1/00 ,  H02M3/156

    CPC classification number: H02M3/1586 ,  H02M1/0003 ,  H02M3/1584 ,  H02M3/1566

    Abstract: An example circuit includes a loop controller having current phase inputs, a feedback input, a control loop output and a transient event output. The feedback input is adapted to be coupled to an output terminal of a multi-phase power stage. A PWM circuit has a blanking input, a control input and a PWM output, the control input coupled to the control loop output. A phase management circuit has a transient detect input, a PWM input, a blanking output and phase outputs. The transient detect input is coupled to the transient event output. The PWM input is coupled to the PWM output and the blanking output is coupled to the blanking input. Each of the phase outputs is adapted to be coupled to a respective phase of the multi-phase power stage. The phase management circuit is configured to provide a blanking control signal representative of a variable blanking time.

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