公开(公告)号：US09130552B2

公开(公告)日：2015-09-08

申请号：US14072142

申请日：2013-11-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vishal Gupta ,  David R. Olson

IPC: H03K5/22 ,  H03K5/15 ,  H02M1/38

CPC classification number: H03K5/15 ,  H02M1/38 ,  H02M3/1588 ,  H02M2001/0012 ,  Y02B70/1466

Abstract: An integrated circuit includes a detector configured to monitor a high-drive signal and a low-drive signal that drives a high-side switch and a low-side switch respectively of an integrated circuit switching regulator. The detector monitors both the rising edge and the trailing edge of each of the high-drive and the low-drive signals respectively to determine a timing overlap between the signals and generates a detection signal indicating a dead-time value proportional to the presence or absence of the timing overlap between the signals. An output circuit can be configured to process the detection signal from the detector to enable a correction of the timing overlap between the signals if timing overlap is detected.

Abstract translation: 集成电路包括检测器，其被配置为监视分别驱动集成电路开关调节器的高侧开关和低边开关的高驱动信号和低驱动信号。 检测器分别监测高驱动信号和低驱动信号中的每一个的上升沿和后沿，以确定信号之间的定时重叠，并产生指示与存在或不存在的死区时间值成比例的死区时间值的检测信号 的信号之间的定时重叠。 输出电路可以被配置为处理来自检测器的检测信号，以便如果检测到定时重叠则能够校正信号之间的定时重叠。

公开(公告)号：US20150123710A1

公开(公告)日：2015-05-07

申请号：US14072142

申请日：2013-11-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Vishal Gupta ,  David R. Olson

IPC: H03K5/15

CPC classification number: H03K5/15 ,  H02M1/38 ,  H02M3/1588 ,  H02M2001/0012 ,  Y02B70/1466

Abstract: An integrated circuit includes a detector configured to monitor a high-drive signal and a low-drive signal that drives a high-side switch and a low-side switch respectively of an integrated circuit switching regulator. The detector monitors both the rising edge and the trailing edge of each of the high-drive and the low-drive signals respectively to determine a timing overlap between the signals and generates a detection signal indicating a dead-time value proportional to the presence or absence of the timing overlap between the signals. An output circuit can be configured to process the detection signal from the detector to enable a correction of the timing overlap between the signals if timing overlap is detected.

Abstract translation: 集成电路包括检测器，其被配置为监视分别驱动集成电路开关调节器的高侧开关和低侧开关的高驱动信号和低驱动信号。 检测器分别监测高驱动信号和低驱动信号中的每一个的上升沿和后沿，以确定信号之间的定时重叠，并产生指示与存在或不存在的死区时间值成比例的死区时间值的检测信号 的信号之间的定时重叠。 输出电路可以被配置为处理来自检测器的检测信号，以便如果检测到定时重叠则能够校正信号之间的定时重叠。