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公开(公告)号:US20180351765A1
公开(公告)日:2018-12-06
申请号:US15854583
申请日:2017-12-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeeth Aarey Premanath , Richard Edwin Hubbard , Maxwell Guy Robertson , Lokesh Kumar Gupta , Mark Edward Wentroble , Roland Sperlich , Dejan Radic
CPC classification number: H04L12/40032 , H04L12/12 , H04L12/40039 , H04L2012/40215 , H04L2012/40273
Abstract: Two CAN bus transceivers utilized in a single integrated circuit package with the CAN bus connections between the two transceivers being inverted. Thus, one transceiver is connected to the CAN bus high and low lines while the other transceiver is connected to the CAN bus low and high lines. Both transceivers power up in a standby condition and each transceiver is monitoring for wake up signals on the CAN bus. The transceiver that is correctly connected to the CAN bus detects wake up signals. When the wake up signals are detected at that transceiver, that transceiver is brought to full operating state and the other transceiver is placed in a full standby condition. Additional input resistance is provided with each transceiver to maintain the proper input resistance for the integrated circuit.
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公开(公告)号:US10560282B2
公开(公告)日:2020-02-11
申请号:US15854583
申请日:2017-12-26
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Abhijeeth Aarey Premanath , Richard Edwin Hubbard , Maxwell Guy Robertson , Lokesh Kumar Gupta , Mark Edward Wentroble , Roland Sperlich , Dejan Radic
Abstract: Two CAN bus transceivers utilized in a single integrated circuit package with the CAN bus connections between the two transceivers being inverted. Thus, one transceiver is connected to the CAN bus high and low lines while the other transceiver is connected to the CAN bus low and high lines. Both transceivers power up in a standby condition and each transceiver is monitoring for wake up signals on the CAN bus. The transceiver that is correctly connected to the CAN bus detects wake up signals. When the wake up signals are detected at that transceiver, that transceiver is brought to full operating state and the other transceiver is placed in a full standby condition. Additional input resistance is provided with each transceiver to maintain the proper input resistance for the integrated circuit.
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