Buck-boost DC-DC converter
    2.
    发明授权

    公开(公告)号:US10014777B1

    公开(公告)日:2018-07-03

    申请号:US15672429

    申请日:2017-08-09

    CPC classification number: H02M3/1582

    Abstract: Disclosed examples include inverting buck-boost DC-DC converter circuits with a switching circuit to alternate between first and second buck mode phases for buck operation in a first mode, including connecting an inductor and a capacitor in series between an input node and a reference node to charge the inductor and the capacitor in the first buck mode phase, and connecting the inductor and the capacitor in parallel between an output node and the reference node to discharge the inductor and the capacitor to the output node. For boost operation in a second mode, the switching circuit alternates between connecting the inductor and the capacitor in series between the input node and the reference node to discharge the inductor and charge the capacitor in a first boost mode phase, and connecting the inductor between the input node and the reference node to charge the inductor and connecting the capacitor between the first output node and the reference node to discharge the capacitor to deliver power to the output node in a second boost mode phase.

    Buck-boost DC-DC converter
    3.
    发明授权

    公开(公告)号:US10763748B2

    公开(公告)日:2020-09-01

    申请号:US15995331

    申请日:2018-06-01

    Abstract: Disclosed examples include inverting buck-boost DC-DC converter circuits with a switching circuit to alternate between first and second buck mode phases for buck operation in a first mode, including connecting an inductor and a capacitor in series between an input node and a reference node to charge the inductor and the capacitor in the first buck mode phase, and connecting the inductor and the capacitor in parallel between an output node and the reference node to discharge the inductor and the capacitor to the output node. For boost operation in a second mode, the switching circuit alternates between connecting the inductor and the capacitor in series between the input node and the reference node to discharge the inductor and charge the capacitor in a first boost mode phase, and connecting the inductor between the input node and the reference node to charge the inductor and connecting the capacitor between the first output node and the reference node to discharge the capacitor to deliver power to the output node in a second boost mode phase.

    Startup clamp circuit for non-complimentary differential pair in DCDC converter system

    公开(公告)号:US10298127B2

    公开(公告)日:2019-05-21

    申请号:US15432327

    申请日:2017-02-14

    Abstract: A DCDC converter includes a transconductance amplifier, a comparator, a current driving component, an output impedance, a switch, a clamp resistor and a p-channel FET. The transconductance amplifier outputs a transconductance current and a switch control signal. The comparator has a two n-channel FET inputs forming a differential pair and outputs a compared signal. The current driving component generates an output current based on the compared signal. The output impedance component generates an output DC voltage based on the output current. The switch is between the two n-channel FETs and can open and close based on the switch control signal. The clamp resistor is arranged in series with the switch. The p-channel FET is in series with the clamp resistor and is controlled by the output DC voltage.

    BUCK-BOOST DC-DC CONVERTER
    5.
    发明申请

    公开(公告)号:US20190052173A1

    公开(公告)日:2019-02-14

    申请号:US15995331

    申请日:2018-06-01

    CPC classification number: H02M3/1582

    Abstract: Disclosed examples include inverting buck-boost DC-DC converter circuits with a switching circuit to alternate between first and second buck mode phases for buck operation in a first mode, including connecting an inductor and a capacitor in series between an input node and a reference node to charge the inductor and the capacitor in the first buck mode phase, and connecting the inductor and the capacitor in parallel between an output node and the reference node to discharge the inductor and the capacitor to the output node. For boost operation in a second mode, the switching circuit alternates between connecting the inductor and the capacitor in series between the input node and the reference node to discharge the inductor and charge the capacitor in a first boost mode phase, and connecting the inductor between the input node and the reference node to charge the inductor and connecting the capacitor between the first output node and the reference node to discharge the capacitor to deliver power to the output node in a second boost mode phase.

    Inverting buck-boost power converter

    公开(公告)号:US10447161B2

    公开(公告)日:2019-10-15

    申请号:US15837914

    申请日:2017-12-11

    Abstract: In an example, a dual-phase inverting buck-boost power converter for use with at least first and second energy storage elements includes an inverting buck-boost power converter and an inverting boost converter. In an example, the inverting buck-boost power converter is coupled between an input node and an output node of the dual-phase inverting buck-boost power converter and includes a first plurality of switches operable to couple to the first energy storage element, wherein the inverting buck-boost power converter is operable to supply a first load current. In an example, the inverting boost converter is coupled in parallel with the inverting buck-boost power converter between the input node and the output node of the dual-phase inverting buck-boost power converter and includes a second plurality of switches operable to couple to the first and the second energy storage elements, wherein the inverting boost converter is operable to supply a second load current.

    Hybrid capacitive-inductive voltage converter

    公开(公告)号:US09991794B2

    公开(公告)日:2018-06-05

    申请号:US15077080

    申请日:2016-03-22

    CPC classification number: H02M3/158

    Abstract: An inverting buck voltage converter constructed of a switched-mode hybrid topology, with a capacitive input stage and an inductive output stage. The input stage operates as a charge pump to charge a flying capacitor connected in series with an inductor in the output stage. Clock circuitry generates first and second non-overlapping clock phases. In the second clock phase, the flying capacitor is charged to the input voltage, with a flying node between the flying capacitor and the output inductor connected at ground through a rectifier, while in the first clock phase, the flying capacitor supports the inductor current. The arrangement of the flying capacitor and inductor is such that the voltage appearing at the output terminal is inverted from the input voltage. Continuous output current is provided. Current limiting techniques protect the flying capacitor from overcurrent conditions.

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