-
公开(公告)号：US20240364210A1
公开(公告)日：2024-10-31
申请号：US18309001
申请日：2023-04-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Florian Neveu , Stefan Schimonsky , Joerg Kirchner
CPC classification number: H02M1/32 , H02M1/0009 , H02M3/157 , H02M3/1582
Abstract: The techniques and circuits, described herein, include solutions for pass-through operation including overcurrent protection in buck-boost converters. In some aspects, first and second switches selectively couple inputs of a peak current comparator to inputs of an error amplifier during pass-through operation. As part of peak current control scheme, one of the peak current comparator inputs is coupled to a current sensor that senses a current through an inductor of the buck-boost converter. As a result, an output of the error amplifier tracks the inductor current during pass-through mode, which may be utilized to implement inductor overcurrent protection in the pass-through mode.
-
公开(公告)号：US20230095293A1
公开(公告)日：2023-03-30
申请号：US17730205
申请日：2022-04-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Florian Neveu
Abstract: In described examples, a phase locked loop (PLL) includes a compensation circuit, a transconductance circuit, and an oscillator. The compensation circuit includes a capacitor circuit and a resistive element having a resistance responsive to a center frequency of the PLL’s bandwidth. The transconductance circuit includes a current source and an error amplifier. The current source generates a current responsive to the center frequency. The error amplifier has a transconductance responsive to the center frequency, and receives a signal responsive to the resistance and a difference between an input clock signal and a feedback signal. The oscillator input is coupled to the error amplifier output. The oscillator provides a signal at its output for generating the feedback signal.
-
Patent Agency Ranking
公开(公告)号：US12126348B2
公开(公告)日：2024-10-22
申请号：US18448319
申请日：2023-08-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Florian Neveu
CPC classification number: H03L7/093 , H03L7/0893 , H03L7/099
Abstract: In described examples, a phase locked loop (PLL) includes a compensation circuit, a transconductance circuit, and an oscillator. The compensation circuit includes a capacitor circuit and a resistive element having a resistance responsive to a center frequency of the PLL's bandwidth. The transconductance circuit includes a current source and an error amplifier. The current source generates a current responsive to the center frequency. The error amplifier has a transconductance responsive to the center frequency, and receives a signal responsive to the resistance and a difference between an input clock signal and a feedback signal. The oscillator input is coupled to the error amplifier output. The oscillator provides a signal at its output for generating the feedback signal.
-
公开(公告)号：US10447161B2
公开(公告)日：2019-10-15
申请号：US15837914
申请日：2017-12-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Erich Bayer , Ivan Shumkov , Nicola Rasera , Stefan Reithmaier , Roland Bucksch , Christian Rott , Florian Neveu
Abstract: In an example, a dual-phase inverting buck-boost power converter for use with at least first and second energy storage elements includes an inverting buck-boost power converter and an inverting boost converter. In an example, the inverting buck-boost power converter is coupled between an input node and an output node of the dual-phase inverting buck-boost power converter and includes a first plurality of switches operable to couple to the first energy storage element, wherein the inverting buck-boost power converter is operable to supply a first load current. In an example, the inverting boost converter is coupled in parallel with the inverting buck-boost power converter between the input node and the output node of the dual-phase inverting buck-boost power converter and includes a second plurality of switches operable to couple to the first and the second energy storage elements, wherein the inverting boost converter is operable to supply a second load current.
-
公开(公告)号：US20250055460A1
公开(公告)日：2025-02-13
申请号：US18789246
申请日：2024-07-30
Applicant: Texas Instruments Incorporated
Inventor： Ivan Raykov Shumkov , Florian Neveu , Florian Schimkat
IPC: H03K19/0185 , H03K3/037
Abstract: An example apparatus includes: level shifter circuitry having a first input terminal, a second input terminal, and an output terminal; latch circuitry having an input terminal and an output terminal, the input terminal of the latch circuitry coupled to the output terminal of the level shifter circuitry; a first transistor having a first terminal and a control terminal, the first terminal of the first transistor coupled to the first input terminal of the level shifter circuitry; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the control terminal of the first transistor, the control terminal of the second transistor coupled to the first input terminal of the level shifter circuitry; and a third transistor having a terminal coupled to the second terminal of the second transistor.
-
公开(公告)号：US11870448B2
公开(公告)日：2024-01-09
申请号：US17730205
申请日：2022-04-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Florian Neveu
CPC classification number: H03L7/093 , H03L7/0893 , H03L7/099
Abstract: In described examples, a phase locked loop (PLL) includes a compensation circuit, a transconductance circuit, and an oscillator. The compensation circuit includes a capacitor circuit and a resistive element having a resistance responsive to a center frequency of the PLL's bandwidth. The transconductance circuit includes a current source and an error amplifier. The current source generates a current responsive to the center frequency. The error amplifier has a transconductance responsive to the center frequency, and receives a signal responsive to the resistance and a difference between an input clock signal and a feedback signal. The oscillator input is coupled to the error amplifier output. The oscillator provides a signal at its output for generating the feedback signal.
-
公开(公告)号：US20230387921A1
公开(公告)日：2023-11-30
申请号：US18448319
申请日：2023-08-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Florian Neveu
CPC classification number: H03L7/093 , H03L7/0893 , H03L7/099
Abstract: In described examples, a phase locked loop (PLL) includes a compensation circuit, a transconductance circuit, and an oscillator. The compensation circuit includes a capacitor circuit and a resistive element having a resistance responsive to a center frequency of the PLL's bandwidth. The transconductance circuit includes a current source and an error amplifier. The current source generates a current responsive to the center frequency. The error amplifier has a transconductance responsive to the center frequency, and receives a signal responsive to the resistance and a difference between an input clock signal and a feedback signal. The oscillator input is coupled to the error amplifier output. The oscillator provides a signal at its output for generating the feedback signal.
-
-
-
-
-
-
Search Results
7
records
(took 0.023 seconds)
